Efficient Computer · 2 weeks ago
Physical Design Engineer
San Jose, CA
Full-time
Onsite
Mid, Senior Level
$180K/yr - $210K/yr
3+ years expEfficient Computer is developing the world’s most energy-efficient general-purpose computer processor. They are seeking a Senior ASIC Physical Design Engineer to take ownership of the physical design of low-power designs and lead the integration of various design components.
ComputerEmbedded SoftwareInformation TechnologyManufacturingSemiconductor
Responsibilities
Take ownership of the physical design of multi-hierarchy low-power designs in advanced technology nodes. This includes executing physical-aware logical synthesis, floor planning, place and route, clock tree synthesis, static timing analysis, ERC, IR drop analysis, electromagnetic analysis, and physical verification
Analyze, debug and fix placement-, cts-, routing-, and buffering- related design and flow issues, using semi-custom placement, route guides and other tool directives via scripts to converge design to PPA targets
Own and deliver designs meeting sign-off timing targets (setup/hold across multiple corners with OCV derating) within specified power envelope while managing constraints (sdc)
Lead the integration of the partition/IP, analyze port, feedthrough, macro placements, review DRV, LVS, IR violations and adjust collateral for clean integration
Engage with the digital design team to understand the architecture to address congestion and timing issues through design modifications and functional Engineering Change Orders (ECOs)
Engage with the DFT team to plan and provide early feedback on design decisions that relate to physical implementation
Create scripts for EDA tools to automate tasks and enhance the throughput and quality of the physical design process
Qualification
Required
Master's degree in Electrical Engineering with 5+ years of industry experience or PhD in Electrical Engineering with 3+ years of industry experience
Proven track record of delivering block (or SoC) RTL2GDSII for multiple tape-outs in 22nm or below process technologies
Experience with EDA flow using Cadence/Synopsys/Mentor tools for front‑end (Synthesis/LEC), back‑end (Place and Route), and verification/simulation (Physical Verification) with hierarchical design and abstraction techniques
Hands-on experience in place & route, power and clock-tree implementation, and timing convergence of high-frequency designs
Knowledge of static timing analysis, defining constraints and exceptions, corners/voltage definitions
Experience with low power implementation typical in industry, including advanced knowledge of UPF standard (IEEE-1801)
Excellent scripting skills in TCL, Bash and python
Preferred
Experience in full chip floor planning, partitioning, budgeting, and power grid planning
Knowledge of circuit design, device physics, deep sub-micron technology, and SOI technology and its implications to physical design
Proficiency with industry-grade physical design flow and hands-on building CAD flow infrastructure for PD engineers
Knowledge of design constraints for static timing analysis (synthesis, pre/post‑cts, sign‑off) and corners/voltage definitions
Experience in validating Power Distribution Networks from package to pg grid, IR/EM: static and dynamic
Experience in integrating analog or mixed-signal macro on top-level design
Benefits
401K match
Company-paid benefits
Equity program
Paid parental leave
Flexibility
Company
Efficient Computer
Efficient is creating the world's most energy-efficient general-purpose processor.
11-50 employees
H1B Sponsorship
Efficient Computer has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (5)
2024 (3)
Funding
Current Stage
Early StageTotal Funding
$69.75MKey Investors
Eclipse Ventures
2025-11-18Series Unknown· $53.75M
2023-12-05Seed· $16M
Leadership Team
Brandon Lucia
Co-founder & CEO
Recent News
2025-07-31
Company data provided by crunchbase