Netpace Inc ยท 1 day ago
Senior Staff/Staff SoC Clock Design Engineer
Saratoga, CA
Full-time
Onsite
Senior Level, Lead/Staff
$210K/yr - $270K/yr
15+ years expNetpace Inc is a fast-growing Silicon Valley hardware startup focused on accelerating AI model performance. They are seeking a highly experienced Clock Designer to lead the definition, architecture, and implementation of high-speed clock distribution networks for complex SoC designs.
AnalyticsArtificial Intelligence (AI)ConsultingEnterprise ApplicationsInformation TechnologyMachine Learning
Hiring Manager
Rick Chad
Responsibilities
Lead the architecture definition and implementation of high-speed clock distribution networks in large-scale ICs
Define and manage clock architecture specifications, timing budgets, and design methodologies for SoC designs
Perform clock distribution design modeling, analysis, and implementation to meet aggressive timing and power targets
Drive post-silicon clock distribution characterization and debug, identifying performance bottlenecks and optimizing solutions
Develop cross-clock domain data transfer logic and ensure reliable synchronization across timing domains
Design and implement de-skew mechanisms and cross-clock domain communication protocols
Collaborate with physical design teams for optimal clock tree synthesis, floorplanning, and integration into SoC flows
Own the clocking solution from concept to tape-out, ensuring first-pass silicon success across multiple technology nodes
Build and evolve clocking design methodologies, ensuring robust, reusable, and scalable design practices
Support synthesis, STA, and integration teams with design constraints (SDC/CDC) and cross-domain timing closure
Participate in system-level architecture reviews and cross-functional discussions to drive overall design quality and performance
Qualification
Required
Bachelor's or Master's degree in Electrical Engineering or a related field
15+ years of industry experience in custom circuit design and clock distribution networks for high-speed SoCs
Demonstrated leadership in delivering complex clock architectures and clock distribution implementations across several tapeouts
Expertise in clock timing analysis, budgeting, and hands-on experience with clock de-skew and domain crossing techniques
Proficiency in physical implementation tools such as Cadence Innovus/Genus or Synopsys Fusion Compiler
Strong scripting skills in Unix, Perl, Python, or TCL for automation and analysis
Excellent understanding of synthesis design constraints (SDC, CDC) and their impact on timing and verification
Strong communication and problem-solving skills, with the ability to lead cross-functional teams
Proven ability to deliver results under aggressive schedules, with a high level of accountability and motivation
Preferred
Prior experience with EMIB architectures and interconnect bridge designs
Familiarity with Verilog and SystemVerilog
Multiple tapeouts in deep submicron nodes (7nm or below)
Company
Netpace Inc
Netpace is a Data-Driven company excelling in AI, IT Consulting and Staffing Solutions.
51-200 employees
H1B Sponsorship
Netpace Inc has a track record of offering H1B sponsorships. Please note that this does not
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Distribution of Different Job Fields Receiving Sponsorship
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Trends of Total Sponsorships
2022 (1)
2020 (2)
Funding
Current Stage
Growth StageCompany data provided by crunchbase