Astera Labs · 4 days ago
Technical Chief of Staff for ASIC Engineering
Astera Labs is a company that provides rack-scale AI infrastructure through purpose-built connectivity solutions. They are seeking a technically strong Chief of Staff to lead Engineering Program Management across Silicon Engineering, driving organizational scale, decision velocity, and execution rigor.
AutomotiveElectronicsIntelligent SystemsSemiconductor
Responsibilities
Chief of Staff to Head of Engineering
Drive operational cadence: engineering all hands, staff meetings, agenda/material prep, tech talks, university engagements, action follow-through, and leadership syncs
Frame and resolve high-leverage decisions — proactively surface blockers (technical, operational, organizational) before they escalate
Manage escalations and organizational friction — diagnose root causes, coordinate resolution paths, and ensure durable fixes
Partner cross-functionally with Hardware, Product, and Quality teams to ensure clarity of communication, alignment on priorities, and disciplined follow-through on decisions
Support org design, headcount planning, and hiring prioritization for engineering teams
Maintain alignment across functions through clear messaging and communication, validate exitance and validation of processes
Navigate org dynamics, build trust, and constructively challenge assumptions; maintain psychological safety
Support the head of engineering with administrative and org related activities
Lead ASIC Tape out Management (Silicon Programs)
Status management — collect and track status across functions contributing to ASIC tapeouts
Milestone tracking — maintain methodology checklists and boundary agreements to ensure schedule adherence
IP and vendor tracking — own visibility into IP deliveries, version inventory, vendor issues, and escalation loops
Quality & documentation — monitor quality KPIs, ensure engineering documentation completeness
Requirements tracking — ensure PRDs/features are captured, tracked, baselined
Resource monitoring — track compute, hardware, storage consumption and thresholds
Internal reporting — generate status reporting for Silicon Engineering leadership
Influence Without Authority
Drive cross-engineering outcomes through credibility, clarity, and follow-through — not hierarchy
Create order in ambiguous spaces; shape scope where it is undefined
Qualification
Required
10+ years in semiconductor/SoC/ASIC or adjacent high-complexity engineering environment (e.g., CPU/IP/System companies)
Proven success in Chief of Staff, Staff Program Manager, TPM Director, or similar technical leadership-enablement role
Strong technical acumen — able to understand engineering trade-offs and make decisions with limited information, challenge assumptions, and earn credibility with senior ICs
Demonstrated experience running program cadence for complex silicon programs (tapeout, IP integration, etc.)
Proven ability to organize complex workflows and drive consistent follow-through
High EQ and organizational awareness; can navigate tension and align diverse viewpoints
Exceptional written/verbal communication, structured thinking, and execution discipline
Preferred
Prior experience in leading RTL2GDSII chip design is a huge plus
Benefits
Discretionary bonus
Incentives
Benefits
Company
Astera Labs
Astera Labs is a semiconductor company that provides connectivity solutions for intelligent systems.
H1B Sponsorship
Astera Labs has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (50)
2024 (44)
2023 (17)
2022 (26)
2021 (14)
2020 (7)
Funding
Current Stage
Public CompanyTotal Funding
$206.35MKey Investors
Fidelity
2024-03-20IPO
2022-11-17Series D· $150M
2021-09-27Series C· $50M
Recent News
2025-12-29
thefly.com
2025-12-13
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