Marvell Technology · 2 days ago
Senior Staff Physical Design Manager
Santa Clara, CA
Full-time
Onsite
Senior Level, Lead/Staff
$157K/yr - $235K/yr
5+ years expMarvell Technology is a leader in semiconductor solutions that power data infrastructure across various sectors. The Senior Staff Physical Design Manager will provide technical direction and mentorship while overseeing project planning and resource allocation in the Physical Design team, contributing to the development of next-generation processor and data center chips.
DSPInternet of ThingsManufacturingSemiconductorWireless
Responsibilities
Provide technical direction, coaching, and mentoring to employees on your team and others when necessary to achieve successful project outcomes
Assist in planning and designating project resources, monitor progress, and keep stakeholders informed the entire way
Partner with other ASIC design teams to ensure project success
Possibility of being management interface to ASIC customers
Lead recruiting efforts at local universities and hiring of experienced engineers
Qualification
Required
Bachelor's degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience or Master's degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5 years of experience or equivalent professional experience in lieu of a formal degree
Must have a background in ASIC or SOC development
Physical design knowledge, from netlist handoff to GDS tape-out including floor planning, place and route, clock tree synthesis, timing closure and physical verification
Must be able to handle a wide variety of projects and technical challenges
Diligent, detail-oriented, and able to handle assignments with minimal supervision
The successful candidate will have excellent written and oral communications skills, and ability to collaborate and be effective in fast-paced environment
Self-driven individual and with ability to partner with world-wide team
Preferred
Minimum 2 years of experience leading projects within semiconductor product development or tape-out cycles. Proven track record of team mentorship for high performance
Technical leadership of ASIC or SOC Netlist to GDS tape-out
Experience as either top-level physical design lead, STA chip Lead or chip DFT lead
Project management experience of ASIC or SOC
Customer interface experience
Experience working with a distributed team
Benefits
Flexible time off
401k
Year-end shutdown
Floating holidays
Paid time off to volunteer
Company
Marvell Technology
We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology.
5001-10000 employees
H1B Sponsorship
Marvell Technology has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (242)
2024 (186)
2023 (154)
2022 (210)
2021 (210)
2020 (165)
Funding
Current Stage
Public CompanyTotal Funding
unknown2017-01-20Post Ipo Equity
2016-05-13Post Ipo Equity
2015-02-05Acquired
Leadership Team
Matthew Murphy
Chairman and CEO
Radha Nagarajan
SVP & CTO, Optical Engineering
Recent News
2026-01-03
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