Broadcom · 4 days ago
IC / Semiconductor Package Designer
San Jose, CA
Full-time
Onsite
Mid, Senior Level
$120K/yr - $192K/yr
6+ years expBroadcom is seeking an experienced IC Packaging Engineer to drive next-generation package architecture, design, and productization using advanced node silicon. The role involves collaboration with various teams to define and deliver innovative package solutions while ensuring high standards in design and manufacturing.
MobileSemiconductorWireless
Responsibilities
Collaborate with chip design and analog/digital IP/PHY teams (224G/112G SerDes, PCIe Gen 6/7, ADC/DAC, etc.) to optimize chip floorplan, die bump patterns, and IO architecture for advanced node products
Co-optimize package stack-up, layer count, escape routing, BGA pattern, and power integrity architecture aligned to system and manufacturing requirements
Interpret SI/PI parameters (RL, IL, NEXT/FEXT, etc.) to drive signal integrity optimization
Work with IC design, system engineering, SI/PI, and thermal teams to perform BGA substrate design using Cadence APD or equivalent tools
Ensure package designs meet SI/PI, mechanical, high-power thermal and reliability targets
Define and refine assembly BOM, process flows, and design rules for advanced packaging technologies
Define POR for new silicon nodes including bump metallization, geometry, and process requirements
Drive implementation, optimization, and HVM qualification of new package / assembly technologies
Own packaging deliverables from concept through substrate design, development, qualification, and high-volume manufacturing
Lead interactions with assembly, substrate, and manufacturing partners for NPI bring-up and production ramp
Provide sustaining support during HVM, including multi-source enablement
Work closely with QA, product/test engineering, and customer teams to diagnose and resolve quality, reliability, or manufacturing issues
Qualification
Required
Bachelors and 8+ years or Masters degree and 6+ years or PhD and 3+ years of related experience
Extensive hands-on experience in advanced IC packaging for advanced silicon nodes
Expertise in substrate design, SI/PI principles, thermal management, and high-speed IO packaging
Strong understanding of high layer count, large body, flip chip BGA packaging technology
Proficiency in Cadence Allegro APD/SIP or comparable packaging design tools
Experience working with global OSATs and substrate suppliers
Proven ability to drive NPI through HVM with strong cross-functional leadership
Excellent communication, documentation, and customer-facing skills
Preferred
BS/MS/PhD in Electrical Engineering (Preferred), Mechanical Engineering, Materials Science, or related field
Benefits
Medical, dental and vision plans
401(K) participation including company matching
Employee Stock Purchase Program (ESPP)
Employee Assistance Program (EAP)
Company paid holidays
Paid sick leave and vacation time
Paid Family Leave and other leaves of absence
Company
Broadcom
Broadcom is a designer, developer, and global supplier of a broad range of analog and digital semiconductor connectivity solutions.
10001+ employees
H1B Sponsorship
Broadcom has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (92)
2024 (77)
2023 (79)
2022 (112)
2021 (110)
2020 (89)
Funding
Current Stage
Public CompanyTotal Funding
unknown2017-10-31Post Ipo Equity
2015-05-28Acquired
1998-04-17IPO
Leadership Team
Greg Singh
CTO for APJ, Enterprise Security Group
Kirsten Spears
CFO and CAO, Broadcom
Recent News
2026-01-07
The Motley Fool
2026-01-07
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