Qualcomm · 3 days ago
CPU Physical Design Timing Engineer (Austin, TX)
Austin, TX
Full-time
Onsite
Entry, Mid Level
$122K/yr - $184K/yr
1+ years expQualcomm Technologies, Inc. is a leader in the semiconductor industry, aiming to transform computing platforms. The CPU Physical Design Timing Engineer will define and develop CPU timing closure for Oryon CPU Cores, collaborating with various teams to achieve performance, power, and area goals.
Artificial Intelligence (AI)Generative AISoftwareTelecommunicationsWireless
Responsibilities
STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs of Oryon CPU Cores
Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus
Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation
Find out the root cause of timing miscorrelation at different design levels in functional and test mode, propose solutions
Evaluate multiple timing methodologies/tools on different designs and technology nodes
Good Technical writing and Communication skills and should be willing to work in cross-collaborative environment
Familiar with digital flow design implementation RTL to GDS : ICC, Innovus , PT/Tempus
Qualification
Required
Excellent automation skills using TCL/Perl/Python
Be able to develop/work on automation scripts with the given spec to develop CPU STA signoff flow /methodology
History of any framework /tool /utility development is preferred
STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs of Oryon CPU Cores
Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus
Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation
Find out the root cause of timing miscorrelation at different design levels in functional and test mode, propose solutions
Evaluate multiple timing methodologies/tools on different designs and technology nodes
Good Technical writing and Communication skills and should be willing to work in cross-collaborative environment
Familiar with digital flow design implementation RTL to GDS : ICC, Innovus , PT/Tempus
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience
OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 1+ year of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience
OR PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field
Preferred
Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining and managing timing constraints, Latch transparency handling, 0-cycle, multi-cycle path handling
Hands-on experience with STA tools - Prime-time, Tempus
Have experience in driving timing convergence at Chip-level and Hard-Macro level
In-depth knowledge crosstalk noise, Signal Integrity, Layout Parasitic Extraction, feed through handling
Knowledge of ASIC back-end design flows and methods and tools (ICC2, Innovus)
Basic knowledge of device physics
Benefits
Competitive annual discretionary bonus program
Opportunity for annual RSU grants
Highly competitive benefits package
Company
Qualcomm
Qualcomm designs wireless technologies and semiconductors that power connectivity, communication, and smart devices.
10001+ employees
H1B Sponsorship
Qualcomm has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
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2025 (2013)
2024 (1910)
2023 (3216)
2022 (2885)
2021 (2104)
2020 (1181)
Funding
Current Stage
Public CompanyTotal Funding
$3.5M1991-12-20IPO
1988-01-01Undisclosed· $3.5M
Leadership Team
Cristiano Amon
President and Chief Executive Officer
I
Isaac Eteminan
CEO
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