Sr Analog IC Design Engineer jobs in United States
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Rambus · 1 week ago

Sr Analog IC Design Engineer

Rambus is a global leader in chip and silicon IP solutions, looking for a Senior Analog IC Design Engineer to join their Bufferchip Design team. In this role, you will be responsible for defining and designing next-generation products that enhance data performance and security.

ArchitectureLightingSemiconductor
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H1B Sponsor Likelynote

Responsibilities

Ownership of Analog designs at chip and/or block level
Define optimal architectures to achieve competitive product specifications
Design, simulate and characterize high-performance and high-speed circuits (e.g. Transmitter, Receiver, ADC, DAC, LDO, PLL, DLL, PI circuits)
Create high level model for design tradeoff analysis and behavior model for verification simulations
Create floorplan and work with layout team to demonstrate post extraction performance
Document analysis and simulation to show that design achieves critical electrical, timing parameters and pre-silicon verification flow
Work with the Lab/System team for test plan, silicon bring up and characterization
Understand and disseminate applicable standards and its relevance in a given project to the team
Mentor junior designers

Qualification

CMOS analog circuit designTransmitter designReceiver designPLL designLDO designVerilog-A modelingMatlab modelingMentoring junior designersCommunication skills

Required

MS EE and 5+ years or PhD EE and 2+ years' experience of CMOS analog circuit design. Position may be tailored appropriately with different level of experience
Prior experience in at least one of the following circuits: Transmitter, Receiver (with CTLE, DFE), PLL, DLL, PI, clock distribution
Good knowledge of design principles for practical design tradeoffs
Fundamental knowledge of basic building blocks like bias, op-amp and LDO
The position requires good written & verbal communication skills as well a strong commitment and ability to work in cross functional and globally dispersed teams

Preferred

Experience in designing memory interfaces such as DDR 4 / 5 or serial links such as PCIE is highly desirable
Prior design experience in FinFET process and digitally assisted design is desirable
Experience in modeling with matlab, Verilog-A, verilog is desirable
Experience working in leading R&D and future technology development projects is desirable

Benefits

Competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program and gym membership.

Company

Rambus designs, develops and licenses chip interface technologies and architectures that are used in digital electronics products.

H1B Sponsorship

Rambus has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (25)
2024 (16)
2023 (7)
2022 (8)
2021 (3)
2020 (11)

Funding

Current Stage
Public Company
Total Funding
$288.57M
2023-07-20Acquired
2011-06-07Post Ipo Equity· $88.57M
2010-02-02Post Ipo Equity· $200M

Leadership Team

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Luc Seraphin
CEO
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Sean Fan
Chief Operating Officer
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Company data provided by crunchbase