ASIC Design Director jobs in United States
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Astera Labs · 1 month ago

ASIC Design Director

Astera Labs is a company that provides rack-scale AI infrastructure through purpose-built connectivity solutions. They are seeking a Director of Digital Design Engineering to lead the microarchitecture, RTL implementation, and front-end development of high-performance connectivity solutions for next-generation network controllers.

AutomotiveElectronicsIntelligent SystemsSemiconductor
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H1B Sponsor Likelynote

Responsibilities

Lead the microarchitecture, RTL implementation, and front-end development of high-performance connectivity solutions for next-generation network controllers
Manage multiple priorities, prepare for and lead customer discussions, and operate independently with minimal supervision
Demonstrated ownership of full-chip or block-level development from architecture through GDS, delivering multiple complex designs into production, working closely with both hardware and software teams
Hands-on experience and strong working knowledge of Ethernet or UALink
Solid understanding of packet-based switching architectures and network protocol processing
Proven experience with switch fabrics, crossbar architecture, and high-speed memory subsystems
Familiarity with high-speed interconnect protocols such as Ethernet, UALink, Infinity Fabric, NVLink, or HyperTransport
Strong front-end design expertise including architecture, RTL development, simulation, synthesis, timing closure, GLS, and DFT
Experience with Cadence and/or Synopsys digital design and DFT tool flows
Knowledge of DFT methodologies, including stuck-at and transition fault scan insertion
Expertise in silicon bring-up, performance tuning, and lab-based debug using equipment such as logic analyzers, scopes, protocol analyzers, and high-speed test setups
Experience working with advanced technology nodes (5nm or below)
Proficiency in scripting languages such as Python or equivalent
Experience developing or supporting PCIe, Ethernet, or DDR-based products; familiarity with security-related standards
Background in developing ASIC design methodologies and driving methodology adoption across teams

Qualification

Front-end ASIC designEthernetUALinkPacket-based switchingHigh-speed interconnect protocolsDigital design toolsSilicon bring-upScripting languagesAdvanced technology nodesLeadership experienceCustomer focus

Required

Bachelor's degree in Electrical or Computer Engineering required; Master's degree preferred
12+ years of experience developing or supporting complex SoC/silicon products for server, storage, or networking applications
5+ years of technical leadership or engineering management experience
Strong professional presence with the ability to manage multiple priorities, prepare for and lead customer discussions, and operate independently with minimal supervision
Entrepreneurial, open-minded, and action-oriented mindset with a strong customer focus
Authorized to work in the U.S. and able to start immediately
Hands-on experience and strong working knowledge of Ethernet or UALink
Solid understanding of packet-based switching architectures and network protocol processing
Proven experience with switch fabrics, crossbar architecture, and high-speed memory subsystems
Familiarity with high-speed interconnect protocols such as Ethernet, UALink, Infinity Fabric, NVLink, or HyperTransport
Strong front-end design expertise including architecture, RTL development, simulation, synthesis, timing closure, GLS, and DFT
Demonstrated ownership of full-chip or block-level development from architecture through GDS, delivering multiple complex designs into production, working closely with both hardware and software teams
Experience with Cadence and/or Synopsys digital design and DFT tool flows
Knowledge of DFT methodologies, including stuck-at and transition fault scan insertion
Expertise in silicon bring-up, performance tuning, and lab-based debug using equipment such as logic analyzers, scopes, protocol analyzers, and high-speed test setups
Experience working with advanced technology nodes (5nm or below)

Preferred

Proficiency in scripting languages such as Python or equivalent
Experience developing or supporting PCIe, Ethernet, or DDR-based products; familiarity with security-related standards
Background in developing ASIC design methodologies and driving methodology adoption across teams

Company

Astera Labs

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Astera Labs is a semiconductor company that provides connectivity solutions for intelligent systems.

H1B Sponsorship

Astera Labs has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (50)
2024 (44)
2023 (17)
2022 (26)
2021 (14)
2020 (7)

Funding

Current Stage
Public Company
Total Funding
$206.35M
Key Investors
Fidelity
2024-03-20IPO
2022-11-17Series D· $150M
2021-09-27Series C· $50M

Leadership Team

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Jitendra Mohan
CEO
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Casey Morrison
Chief Product Officer, Co-Founder
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Company data provided by crunchbase