TSMC · 1 month ago
Physical Design Verification Lead (7264)
San Jose, CA
Full-time
Onsite
Senior Level, Lead/Staff
$153K/yr - $230K/yr
10+ years expTSMC Technology Inc. is at the forefront of semiconductor innovation, delivering cutting-edge solutions that power the next generation of technology. They are seeking a highly experienced Physical Design Verification Lead to ensure the robust physical integrity and performance of high-performance chip designs, leading comprehensive verification efforts from block-level implementation to final production tapeout.
Consumer ElectronicsElectronicsManufacturingProduct DesignSemiconductor
Responsibilities
Lead and execute end-to-end physical design verification for CPU blocks, culminating in successful production chip tapeouts
Collaborate closely with the STA team to implement Engineering Change Orders (ECOs) for critical timing closure
Perform in-depth analysis and resolution of Signal EM/Noise and Power IR/EM issues
Manage comprehensive analysis and cleanup for all physical verification checks, including DRC, LVS, ERC, and Antenna violations
Achieve final physical verification sign-off across all design metrics
Oversee the implementation of customized Clock Tree Structures (CTS) and advanced Place & Route strategies
Optimize block-level floorplans, meticulously analyzing and ensuring high-quality design partitioning
Provide technical leadership and mentorship to junior engineers
Qualification
Required
Master's degree in Electrical Engineering, Computer Engineering, or Computer Science
10-20 years of hands-on experience in physical implementation and verification roles
Demonstrated expertise with major Electronic Design Automation (EDA) tools (e.g., Innovus/ICC2, Calibre) and established design flows
Extensive experience in chip integration and sign-off procedures
Proven experience with advanced technology nodes, specifically TSMC N7 or below
Proficiency in scripting languages, particularly TCL, Perl, and Python, for automation and flow enhancement
Ability and willingness to work full-time at a customer site located in the South Bay area
Preferred
Direct experience with TSMC N2 technology nodes
In-depth knowledge of CPU implementation methodologies
Expertise in advanced timing sign-off methodologies and techniques
A strong track record of successful production tapeouts for multi-million gate designs
Prior experience leading physical verification efforts or small teams
Benefits
Market competitive pay
Allowances
Bonuses
Comprehensive benefits
Extensive development opportunities and programs
Company
TSMC
Established in 1987, TSMC is the world's first dedicated semiconductor foundry.
10001+ employees
H1B Sponsorship
TSMC has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (49)
2024 (27)
2023 (30)
2022 (17)
2021 (31)
2020 (35)
Funding
Current Stage
Public CompanyTotal Funding
$14.2BKey Investors
U.S. Department of CommerceBerkshire Hathaway
2024-04-08Grant· $6.6B
2024-01-01Acquired
2022-09-30Post Ipo Equity· $4.1B
Leadership Team
Morris Chang
Founder, Chairman & CEO
Peter M. Cleveland
Senior Vice President
Recent News
2026-01-16
2026-01-16
Company data provided by crunchbase