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Marvell Technology · 1 day ago

Sr. Principal Engineer, Advanced Packaging

Westlake Village, CA

Full-time

Onsite

Senior Level, Lead/Staff

$171K/yr - $253K/yr

10+ years exp

Marvell Technology is a leading semiconductor solutions provider that focuses on data infrastructure across various domains. They are seeking a Senior Principal Engineer to lead the development and optimization of advanced packaging solutions, mentoring engineers and driving strategic initiatives in packaging technology.

DSPInternet of ThingsManufacturingSemiconductorWireless

Growth Opportunities

No H1B

U.S. Citizen Only

Hiring Manager

Magda Melena

Responsibilities

Lead the development and optimization of advanced packaging solutions, including 2.5D/3D architectures (e.g., CoWoS, EMIB, CPO, CPC)

Evaluate package and PCB designs to meet challenging electrical requirements

Collaborate closely with physical design and IP teams to optimize electrical performance

Execute SI/PI simulations and sign-off using industry-standard EDA tools

Define and drive strategic packaging initiatives aligned with Marvell’s technology roadmap

Lead design and development efforts for optoelectronic packaging, including integration of photonic components and co-design with electrical interconnects

Mentor engineers and foster a culture of innovation and knowledge sharing

Engage with cross-functional teams and external partners to influence design and manufacturing strategies

Manage package design and development programs involving global, cross-functional teams

Qualification

Advanced packaging technologySignal integrity (SI)Power integrity (PI)Optoelectronic packagingEDA toolsCircuit extractionPCB designCommunication skillsMentoringCollaboration

Required

Bachelor's degree in Electrical Engineering or related field with 15+ years of experience in package design, or Master's/PhD with 10+/8+ years of relevant experience

Proven expertise in SI/PI fundamentals and simulation methodologies

Experience with EDA tools such as Ansys HFSS, Keysight ADS, Cadence Sigrity, PowerSI, SIwave

Familiarity with packaging technologies, substrate design rules, materials, and assembly processes

Strong understanding of circuit extraction and simulation workflows

Experience in optoelectronic packaging design and development, including photonic-electronic integration

Ability to perform routing feasibility studies using tools like Cadence APD or PCB Editor

Excellent communication, presentation, and documentation skills

Ability to work effectively across geographies and time zones