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AMD · 2 weeks ago

Microprocessor VLSI Physical Design Engineer

Fort Collins, CO

Full-time

Onsite

Senior Level, Lead/Staff

$139K/yr - $209K/yr

8+ years exp

AMD is a leading company in computing technology, focused on delivering innovative products for AI, data centers, and gaming. The role of VLSI Physical Design Engineer involves leading high-speed VLSI design projects, optimizing power and performance, and mentoring junior engineers.

AI InfrastructureArtificial Intelligence (AI)Cloud ComputingComputerEmbedded SystemsGPUHardwareSemiconductor

Growth Opportunities

No H1B

Hiring Manager

Marc Rodriguez

Responsibilities

Technical lead for high-speed VLSI design in deep sub-micron processes

Work closely with RTL and physical designers across multiple sites to optimize power, performance, area, and schedule

Solve design and tool problems requiring ground-breaking approaches and champion innovation across the organization. Create technical presentations for peers and management

Guide and mentor junior engineers

Qualification

High-speed VLSI designComputer architectureChip Level Floor planningStatic Timing AnalysisVerilog RTLProgramming languagesAnalytical thinkingProblem-solving skillsTeamworkCommunication skills

Required

Strong analytical thinking and problem-solving skills with excellent attention to details

Self-motivation and a commitment to meeting deadlines

Creativity and innovation

Excellent verbal and written communication skills

Teamwork skills

Technical lead for high-speed VLSI design in deep sub-micron processes

Work closely with RTL and physical designers across multiple sites to optimize power, performance, area, and schedule

Solve design and tool problems requiring ground-breaking approaches and champion innovation across the organization

Create technical presentations for peers and management

Guide and mentor junior engineers

BS/MS in EE, CS, CSE (or similar)

8+ years hardware design experience

Preferred

Hands-on experience in high-speed VLSI design

Excellent understanding of computer architecture, hardware concepts & design tradeoffs required

Knowledge of Chip Level Floor planning, Bus / Pin Planning, Clock Tree Synthesis, Placement, Optimization, Routing, Parasitic Extraction, Static Timing Analysis, IR drop analysis, electromigration, Physical Verification and Sign Off

Comprehend complex Verilog RTL and make minor modifications for timing or power

Knowledge of digital circuits, high speed flops, synchronizers, level shifters, and SRAM

Familiar with programming languages such as Perl, C, tcl, etc