This job has closed.

Tenstorrent · 2 weeks ago

Sr. Staff Engineer, Design Verification Methodology Lead

Austin, CA

Full-time

Hybrid

Senior Level, Lead/Staff

$100K/yr - $500K/yr

8+ years exp

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. As Design Verification Lead, you'll own the verification strategy for our RISC-V CPU architecture and mentor a growing team of verification engineers while establishing the automation infrastructure necessary for maintaining iteration velocity.

AI InfrastructureApplication Specific Integrated Circuit (ASIC)Artificial Intelligence (AI)ElectronicsMachine LearningSemiconductor

Comp. & Benefits

No H1B

U.S. Citizen Only

Responsibilities

Verification strategy aligned with silicon outcomes. Developing testbenches and coverage strategies that identify critical design issues before manufacturing

Team scaling and process optimization. Building verification libraries, establishing best practices, and determining appropriate investment in automation versus custom test development

Advanced CPU verification methodologies. Working with RISC-V architectures and emerging design paradigms relevant to AI compute applications

Qualification

CPU verificationSystemVerilogUVMScripting skillsPythonTestbench developmentAutomation infrastructureRISC-V architectureProcess optimizationTeam mentoring

Required

8+ years of experience in CPU or complex SoC verification

Demonstrated experience closing coverage on designs of comparable complexity and working through silicon-scale debug cycles

Expert-level proficiency in SystemVerilog and UVM

Ability to architect, implement, and optimize testbenches independently

Strong scripting skills, particularly Python

Experience building internal tools and automation that enhances team workflows and integrates verification infrastructure

Preferred

C experience is a plus. Relevant for simulator development or low-level debug work, but not required if your verification automation practice is well-established