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Block · 8 hours ago

Foundry Interface Engineer

San Francisco Bay Area

Full-time

Onsite

Senior Level, Lead/Staff

$198K/yr - $297K/yr

10+ years exp

Block is a company focused on accelerating the world's transition to an open economy with innovative products. The Foundry Interface Engineer will engage with foundry partners and internal teams to enhance ASIC design and optimize production processes, contributing to the development of advanced bitcoin technologies.

Financial Services

H1B Sponsor Likely

Responsibilities

Engage with Foundry partners/third-party vendors to manage foundry PDK/DK and design library collaterals

Guide internal IP/design teams on appropriate usage of technology attributes/offerings in accordance with product requirements (e.g., performance, power, area, and cost)

Collaborate with internal third-party infrastructure, customization, test-chip, methodology, and packaging and product test engineering teams for seamless execution of product bring-up and productization

Review and assess Foundry silicon data against SPICE/design goals and compile SPICE to Silicon gap analysis. Drive foundry partners on CIPs to improve foundry process to meet technology entitlement and product goals

Work with foundry to identify potential device parameter changes to enable efficient low-voltage operation

Work closely with circuit designers to determine what device improvements could improve circuit performance and energy efficiency

Work with test engineers to analyze and validate production wafer data

Contribute to binning strategy to maximize parametric yield

Qualification

Foundry design kitSPICE analysisAdvanced node device physicsLow power design techniquesStatistical data analysisDevice/process architectureProduct KPIsCommunication skillsCollaboration skills

Required

10 + years of post-education experience in FAB/Fabless environments, technology definition and bring-up, device/process architecture, and NPI

Experience with foundry design kit, SPICE, DR/DRC evaluation, SPICE to Si assessment

Experience with advanced node device physics (e.g. FinFET/GAA), backside power, product design phases

Experience with product KPIs, DTCO, and parametric, DLY/PLY analysis/gap closure

Understanding of low power design techniques (e.g., Vmin reduction, power gating, multi-voltage design, chip power, clock network and optimization)

Understanding of layout effects and impact to circuit design

Excellent statistical, data analysis, and communication skills

Preferred

Master's degree or PhD in Electrical Engineering, Physics, or other related Engineering field with emphasis on semiconductor materials/devices and device physics (not a substitute for professional experience)

Production test development experience

Familiar with advanced FinFET technology nodes (3nm and 2nm)

Familiar with PDK and device models

Previous work experience at semiconductor foundries

Familiar with standard cell design and layout

Benefits

Remote work

Medical insurance

Flexible time off

Retirement savings plans

Modern family planning

Company

Block

Glassdoor3.9

Block is one company built from many blocks, all united by the same purpose of economic empowerment.

Founded in 1990

Oakland, California, US

10001+ employees

https://block.xyz/

H1B Sponsorship

Block has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)

Distribution of Different Job Fields Receiving Sponsorship

Represents job field similar to this job

Trends of Total Sponsorships

2025 (257)

2024 (253)

2023 (260)

2022 (297)