Northrop Grumman Australia · 1 month ago
Staff Lead Design Verification Engineer
United States-Maryland-Annapolis Junction
Full-time
Onsite
Lead/Staff
$188K/yr - $282K/yr
10+ years expNorthrop Grumman is a pioneering technology company that impacts lives globally through revolutionary systems. They are seeking a Staff Lead Design Verification Engineer to lead a verification team in developing high-performance computing systems, focusing on digital verification processes and methodologies.
Defense & Space
No H1B
Security Clearance RequiredU.S. Citizen Only
Responsibilities
Create comprehensive test-benches for behavioral simulation
Design and implement verification strategies for complex digital systems
Ensure RTL implementation meets precise design specification requirements
Conduct in-depth behavioral simulations across ASIC and FPGA
Generate and execute advanced UVM Test cases
Achieve 95% code coverage goals and functional coverage across critical metrics
Perform detailed code coverage analysis, including: (Statement coverage, Expression coverage, Branch coverage, Toggle coverage)
Utilize both functional and timing simulation tools
Verify logical behavior and implementation accuracy
Identify and resolve signal delay and performance issues in gate timing requirements
Develop comprehensive Universal Verification Methodology (UVM) simulation environments
Work closely with design teams to validate RTL implementations
Provide detailed feedback and recommendations for design improvements
Participate in design reviews and Lead in verification planning
Mentor junior verification engineers
Contribute to continuous improvement of verification methodologies
Qualification
Required
Bachelor's degree in Computer Engineering, BSEE, or comparable STEM Degree and 12 years industry experience in a design verification role or Master's Degree plus 10 years experience or PhD plus 7 years experience
Experience with functional verification methodology for the full life cycle of products with leading a team with various levels of experience and skills
Demonstrated experience leading Verification Teams
Specialized experience in functional verification with multiple Tape Outs
Expert-level proficiency in Hardware Description Languages: (Verilog, VHDL, SystemVerilog)
Extensive knowledge of: (comprehensive RTL design methodologies, Behavioral simulation techniques, Code coverage strategies)
Extensive experience with industry-standard EDA tools (Cadence, Synopsys, Mentor Graphics)
Extensive experience with verification methodologies: Universal Verification Methodology (UVM)
Regression and automation framework development
This position requires the applicant to be a U.S. citizen
Candidates must be willing to obtain and maintain a security clearance
Preferred
Advanced Degrees in Electrical Engineering, Computer Engineering, Computer Science, or related technical fields
Experience with advanced Gate Level Simulations
Experience with the management of schedule, cost, metric reporting, and trade studies
Benefits
Health insurance coverage
Life and disability insurance
Savings plan
Company paid holidays
Paid time off (PTO) for vacation and/or personal business
Company
Northrop Grumman Australia
Northrop Grumman Australia is the Australia-based arm of Northrop Grumman Corporation and committed to generating long-term prosperity, investing in advanced Research & Development, sovereign and exportable Intellectual Property, high-quality jobs and long-term technology leadership across the Commonwealth.
501-1000 employees
Funding
Current Stage
Late StageCompany data provided by crunchbase