NVIDIA · 9 hours ago
Senior Timing Methodology Engineer
Austin, TX
Full-time
Onsite
Mid, Senior Level
$136K/yr - $213K/yr
3+ years expNVIDIA is a leading technology company known for its innovations in GPU technology and AI. They are seeking a Senior Timing Methodology Engineer to drive sign-off strategies for GPUs and SoCs, focusing on optimizing performance and reliability through advanced modeling and automation.
Artificial Intelligence (AI)Consumer ElectronicsGPUHardwareSoftwareVirtual Reality
Responsibilities
Improve and validate flows for Prime-Time , Prime-Shield and Tempus STA QoR metrics for sign-off flow, and tool for high-speed designs, with focus on CAD and automation
Develop custom flows for validating QoR of ETM models, both of std cells and custom IPs
Develop flows/recommendations on STA sign-off to model deep submicron physical effects aging, self-heating, thermal impact, IR drop etc
Collaborate with technology leads, VLSI physical design, and timing engineers to define and deploy the most sophisticated strategies of signing off timing in design for world-class silicon performance
Develop tools, and methodologies to improve design performance, predictability, and silicon reliability beyond what industry standard tools can offer
Work on various aspects of STA, constraints, timing and power optimization
Qualification
Required
MS (or equivalent experience) in Electrical or Computer Engineering with 3 years' experience in ASIC Design and Timing
Good understanding of modeling circuits for sign-off
Good knowledge of extraction, device physics, STA methodology and EDA tools limitations
Good understanding of mathematics/physics fundamentals of electrical design
Clear understanding of low power design techniques such as multi VT, Clock gating, Power gating, Block Activity Power, and Dynamic Voltage-Frequency Scaling (DVFS), CDC, signal/power integrity, etc
Understanding of 3DIC, stacking, packing, self-heating and its impact on timing/STA closure
Background with crosstalk, electro-migration, noise, OCV, timing margins
Familiarity with Clocking specs: jitter, IR drop, crosstalk, spice analysis
Understanding of standard cells/memory/IO IP modeling and its usage in the ASIC flow
Hands-on experience in advanced CMOS technologies, design with FinFET technology 5nm/3nm/2nm and beyond
Expertise in coding- TCL, Python
C++ is a plus
Familiarity with industry standard ASIC tools: PT, ICC, Redhawk, Tempus etc
Strong communications skill and good standout colleague
Benefits
Equity
Benefits
Company
NVIDIA
NVIDIA is a computing platform company operating at the intersection of graphics, HPC, and AI.
10001+ employees
H1B Sponsorship
NVIDIA has a track record of offering H1B sponsorships. Please note that this does not
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Funding
Current Stage
Public CompanyTotal Funding
$4.09BKey Investors
ARPA-EARK Investment ManagementSoftBank Vision Fund
2023-05-09Grant· $5M
2022-08-09Post Ipo Equity· $65M
2021-02-18Post Ipo Equity
Leadership Team
Jensen Huang
Founder and CEO
Michael Kagan
Chief Technology Officer
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