Intel Corporation · 1 month ago
Senior Layout Designer
US, Oregon, Hillsboro
Full-time
Hybrid
Mid, Senior Level
$121K/yr - $228K/yr
4+ years expIntel Corporation is a leading technology company specializing in semiconductor manufacturing. The Senior Layout Designer will design, implement, and verify layout designs of test structures and circuits to support the development of advanced silicon technologies, collaborating with various teams to ensure quality and reliability.
Semiconductors
Responsibilities
Develops custom layout design of analog blocks, complex digital, mixed signal blocks, standard cell libraries, or memory compilers (e.g., bitcells, SRAMs, Register Files)
Performs detailed physical array planning, area optimization, digital block synthesis, critical wire analysis, custom leaf, cell layout, and compiler assembly coding
Conducts complete layout verification including design rule compliance, SoC integration specs, electron migration, voltage drop (IR), selfheat, ESD, and other reliability checks. Uses custom auto-routers and custom placers to efficiently construct layout
Provides feedback to circuit design engineers for new feature feasibility studies and implements circuit enhancement requests
Develops and drives new and innovative layout methods to improve productivity and quality
Troubleshoots a wide variety of issues up to and including design and tool/flow/methodology issues used for layout design
Designs, implements, verifies, and supports the enablement and adoption of hardware design tools, flows, and methodologies
Defines methodologies for hardware development related to technology node and EDA tool enabling
Creates and verifies unique hardware designs, assembles design platforms, and integrates components into hierarchical systems to provide deployment coverage for end-to-end EDA tool testing on new technology nodes
Develops, tests, and analyzes engineering design automation tools, flow, and methodologies to improve efficiency and optimize power and performance
Supports development and enhancement of platforms, databases, scripts, and tools flows for design automation
Builds deep understanding of digital design, verification, structural and physical layout, full-chip integration, power, and performance clocking, and/or timing to enhance future TFM development
Collaborates with EDA vendors on defining and early testing of next-generation design tools
Qualification
Required
Bachelor's degree in Electrical/Computer Engineering or related field and 6+ years of experience OR a Master's degree in Electrical/Computer Engineering or related field and 4+ years of experience OR a PhD in Electrical/Computer Engineering or related field and 2+ years of experience in: Layout design & Cadence Virtuoso
Preferred
6+ years of experience in: CMOS VLSI design concepts, flows, and EDA tools
Programming/scripting in C/C++, Python
UNIX/Linux operating systems
8+ years of experience in layout design, Cadence Virtuoso Layout Suite, layout debug (DRC, LVS)
4+ years of experience in EDA Tools, Flows, and Methodology (TFM) development
1+ year of experience with Cadence SKILL programming languages
Experience leading and coordinating small/medium size group of layout designers
Strong initiative, analytical/problem solving skills, communication skills, team working skills, ability to multitask and be able to work with a diverse team located in different geos
Benefits
We offer a total compensation package that ranks among the best in the industry.
Competitive pay
Stock
Bonuses
Benefit programs which include health, retirement, and vacation.
Company
Intel Corporation
Our mission is to shape the future of technology to help create a better future for the entire world, that’s the power of Intel Inside.
10001+ employees
H1B Sponsorship
Intel Corporation has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
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2025 (2793)
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2022 (4811)
2021 (3359)
2020 (1174)
Funding
Current Stage
Late StageLeadership Team
Brea Watts, MFA
Communications Manager, CEO
Carol Bartz
CEO
Recent News
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