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Siemens · 1 month ago

Product Engineer - Tessent DFT

Santa Clara, CA

Full-time

Hybrid

Mid, Senior Level

$130K/yr - $233K/yr

5+ years exp

Siemens is a global technology leader in Electronic Design Automation software, and they are seeking a Product Engineer specializing in design-for-test (DFT). The role involves defining product capabilities, collaborating with R&D, and supporting product adoption while interacting with customers and stakeholders.

Artificial Intelligence (AI)ConsultingCyber SecurityInternet of Things

No H1B

U.S. Citizen Only

Responsibilities

Define and characterize new product capabilities needed to meet customer requirements

Work collaboratively with Tessent R&D to prototype, evaluate, and test new DFT products and features within complex IC design flows

Lead beta programs and support beta partners

Drive product adoption

Create and deliver in-depth technical presentations, develop training material, white papers, contributed articles, and application notes

Develop and review tool documentation such as User and Reference manuals

Work with customers as well as Siemens EDA stakeholders such as regional application engineers, global support engineers, and marketing

Work through complex technical issues and independently create solutions and new methodologies

Explain complex principles in simple terms to broad audiences

Some travel, domestic and international

Qualification

DFT for ASICs/SOCsAutomatic test pattern generationTCL scriptingVerilog/SystemVerilog/VHDLTessent products experienceLINUX proficiencyEnglish communication skillsProblem-solving skillsOrganizational skills

Required

BS degree (or equivalent) in Electrical Engineering, Computer Science, Computer Engineering, or related field is required

Must have 5-8 years of experience, including 2+ years of experience in DFT for complex ASICs / SOCs, including some of the following areas: Automatic test pattern generation (ATPG), internal scan, embedded scan compression (EDT), packetized test delivery (SSN), memory built-in self-test (MBIST), logic built-in self-test (LBIST), IEEE 1687 IJTAG, analog design and simulation, hierarchical DFT implementation

Self-motivated and results-oriented with strong problem-solving skills

Excellent organizational skills

Excellent written and verbal English language communication skills

Knowledge of IC design trends and emerging requirements

Proficiency in LINUX and Windows environments

Preferred

Exposure to one or more adjacent IC disciplines such as the following a plus: RTL coding and verification using Verilog/SystemVerilog/VHDL, Synthesis and timing analysis, Place and route, Advanced IC packaging, DFT and test for embedded IP cores, Failure diagnosis, ATE use / test program development

Proficiency in a scripting language like TCL (preferred) or Python

Experience with Tessent products such as Tessent Streaming Scan Network, Tessent TestKompress, Tessent ScanPro, Tessent IJTAG and/or other Tessent software, as well as familiarity with Tessent Shell and design flows is a plus