Senior FPGA Reverse Engineer jobs in United States
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STR · 23 hours ago

Senior FPGA Reverse Engineer

STR’s Cyber Division is hiring a Senior FPGA Reverse Engineer who will leverage their digital hardware design background to work within a multi-disciplinary team solving unique problems surrounding FPGA reverse engineering. The role involves executing FPGA reverse engineering tasks, supporting software development, and preparing reports and presentations for customers regarding findings.

Artificial Intelligence (AI)Machine Learning
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Growth Opportunities
badNo H1BnoteSecurity Clearance RequirednoteU.S. Citizen Onlynote

Responsibilities

Perform FPGA reverse engineering work within a team to identify behavioral details of an application
Model, test, and document RE findings using hardware modeling and simulation platforms
Prepare reports and presentations for STR’s customers and collaborators detailing FPGA RE findings
Work with the FPGA RE team to identify new areas for tool development and capability research
Develop software supporting STR’s FPGA reverse engineering capabilities
Participate in design reviews and testing for FPGA RE tools

Qualification

FPGA reverse engineeringHardware description languagesDigital design conceptsSoftware developmentRTL simulationFPGA design processMatlabSimulinkEmbedded systemsSignal processing techniquesProblem solvingTechnical presentation

Required

This position requires the ability to obtain a Top Secret (TS) security clearance, for which U.S. citizenship is needed by the U.S. Government
Bachelors Degree in Computer Engineering/Electrical & Computer Engineering with at least 5 years of relevant experience
Strong problem solving skills and ability to apply a technical background to non-traditional problems
Familiarity with hardware description languages (i.e., Verilog, SystemVerilog, VHDL)
Familiarity with the design process and development path for FPGAs
Comfortable with digital design and logic concepts
Software development experience ideally using Python and/or C/C++
Ability to prepare and present technical material to customers and internal staff

Preferred

Active Top Secret (TS) Security Clearance
Experience writing applications using hardware description languages
Experience applying the design process and development path for FPGAs
In depth knowledge and experience using industry standard FPGAs (Altera, Xilinx devices) and their associated platforms (Quartus, Vivado)
Experience with RTL simulation environments and FPGA verification through in depth test bench development
Experience using Matlab and Simulink
Embedded systems experience including sensor interfacing with an FPGA or microcontroller
Knowledge of signal processing implementation techniques common to FPGA implementations

Company

STR

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STR is built on people & technology platforms tackling tough problems in cybersecurity, distributed sensing & artificial.

Funding

Current Stage
Late Stage

Leadership Team

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Mark McClure
CTO and Executive VP
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James Wright
ACPSO/PERSEC Officer
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