Intel Corporation · 1 month ago
High-Speed Interconnect Senior Validation Engineer
US, Oregon, Hillsboro
Full-time
Hybrid
Senior Level, Lead/Staff
$215K/yr - $303K/yr
10+ years expIntel Corporation is seeking a High-Speed Interconnect Validation Engineer to lead the validation of next-generation data center and AI platform interconnects. The role focuses on ensuring interoperability, performance, reliability, and standards compliance of high-speed I/O fabrics, requiring deep technical knowledge of high-speed protocols and strong debugging skills.
Semiconductors
Responsibilities
Own validation strategy, test planning, and execution for PCIe, CXL, and UALink across silicon, platform, rack, and cluster configurations
Develop comprehensive validation coverage for link training, error handling, fabric scaling, congestion, performance, and protocol compliance
Perform bring-up and debug of high-speed I/O subsystems using protocol analyzers, exercisers, and signal measurement tools
Validate interconnect behavior under AI/ML workloads, stress conditions, and multi-node traffic patterns
Drive interoperability testing across GPUs, accelerators, switches, storage, and memory devices from diverse ecosystem partners
Collaborate with silicon design, board design, firmware, and software teams to resolve complex cross-layer issues
Build automation, diagnostics, and scaling frameworks to validate fabrics at rack-level and multi-rack cluster scale
Analyze performance metrics, identify bottlenecks, and recommend architectural or firmware tuning for optimal interconnect efficiency
Influence next-generation high-speed I/O roadmap by providing data-driven insights from validation cycles
Engage with hyperscalers, OEMs/ODMs, and industry partners to ensure end-to-end readiness for deployment
Qualification
Required
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 10+ years of experience
8+ years of experience in SoC and Validation
Hands-on experience validating high-speed I/O standards such as PCIe Gen4/5/6, CXL 2.0/3.0, or UALink
Solid understanding of protocol layers, link training, flow control, and fabric management
Experience with high-speed debug tools (protocol analyzers, exercisers, oscilloscopes, BERTs)
Strong system-level debug skills across hardware, firmware, BIOS, OS, and drivers
Familiarity with data center or AI platform architecture
Preferred
Experience validating large-scale AI clusters, GPU/accelerator fabrics, or coherent memory pooling
Deep knowledge of CXL switching, memory expansion, and coherency models
Experience with SI/PI fundamentals and their impact on validation outcomes
Familiarity with automation frameworks (Python, Jenkins, etc.) for multi-node testing
Prior collaboration with open standards bodies or hyperscale customers
Benefits
Competitive pay
Stock
Bonuses
Health
Retirement
Vacation
Company
Intel Corporation
Our mission is to shape the future of technology to help create a better future for the entire world, that’s the power of Intel Inside.
10001+ employees
H1B Sponsorship
Intel Corporation has a track record of offering H1B sponsorships. Please note that this does not
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Funding
Current Stage
Late StageLeadership Team
Brea Watts, MFA
Communications Manager, CEO
Carol Bartz
CEO
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