Lead Debug/Trace/Profiling Design Engineer jobs in United States
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SiFive · 1 month ago

Lead Debug/Trace/Profiling Design Engineer

positionBoston, Massachusetts, United States
timeFull-time
remoteOnsite
senioritySenior Level, Lead/Staff
money$194K/yr - $236K/yr
date7+ years exp

SiFive is a pioneer in RISC-V technology, transforming compute performance across various applications. The Lead Debug/Trace/Profiling Design Engineer will be responsible for designing advanced debug, trace, and profiling hardware to support RISC-V adoption in SoC designs, collaborating with multiple teams to ensure rapid and high-quality hardware development.

ElectronicsManufacturingSemiconductorSoftware
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Growth Opportunities
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H1B Sponsor Likelynote

Responsibilities

Architect, design and implement debug, trace and profiling hardware
Work with architecture, performance, software and hardware teams in architecture/microarchitecture exploration and specification
Implement RTL generators such that elements self-configure to optimally design-in extensive configurability as a first-class consideration
Integrate new design content into SiFive’s Chisel/FIRRTL framework and contribute to improvements to that framework to enable automatic configuration/generation of documentation, verification testbenches and tests, and packaged software
Perform initial sandbox verification, and work with design verification team to create and execute thorough verification test plans
Ensure that knowledge is shared via creation and maintenance of great documentation and participation in a culture of collaborative design

Qualification

DebugTraceProfiling architectureRTL design in Verilog/System Verilog/VHDLCPU architecturesChisel/ScalaDebugging toolsObject-oriented programmingFunctional programmingJTAG/cJTAGPower managementSoC designGit/Jira/ConfluenceAttention to detailTeam collaboration

Required

Knowledgeable in debug, trace and profiling architecture and concepts
Knowledgeable in debug interfaces, JTAG, cJTAG
Knowledgeable in CPU architectures, power management and SoC design
Experience in debugging tools, profiling methods
Proficiency with hardware (RTL) design in Verilog, System Verilog, or VHDL
Attention to detail and a focus on high-quality design
Ability to work well with others and a belief that engineering is a team sport
Knowledge of at least one object-oriented and/or functional programming language
7+ years of industry experience leading and directly contributing to architecture, microarchitecture and RTL design for debug/trace/profiling hardware for high-performance processors
MS/PhD in EE, CE, CS or a related technical discipline

Preferred

Knowledge of one or more of: Chisel/Scala, RISC-V architecture, Git/Jira/Confluence is a plus

Benefits

Healthcare and retirement plans
Paid time off

Company

SiFive

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SiFive is a platform offering open-source semiconductor technology and software automation.
dateFounded in 2015
location
San Mateo, California, USA
people-size501-1000 employees
web-link
https://www.sifive.com

H1B Sponsorship

SiFive has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (13)
2024 (6)
2023 (7)
2022 (21)
2021 (17)
2020 (17)

Funding

Current Stage
Late Stage
Total Funding
$365.5M
Key Investors
CoatueSK HynixQualcomm Ventures
2022-03-16Series F· $175M
2020-08-11Series E· $61M
2019-06-06Series D· $65.4M

Leadership Team

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Patrick Little
CEO & Chairman
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Yunsup Lee
Co-Founder & Chief Technology Officer
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Recent News

eeNews Europe
SiFive and IAR strengthen RISC-V automotive toolchain
2025-12-17
SiliconANGLE
Inside the semiconductor revolution: 16 insights shaping the AI era from the GSA Awards
2025-12-09
intelcapital.com
Intel Capital: SiFive
2025-12-05
Company data provided by crunchbase