AMD · 8 hours ago
FPGA Prototyping Toolchain Validation & Regression Lead
San Jose, CA
Full-time
Onsite
Senior Level
$160K/yr - $240K/yrAMD is a company focused on building great products that advance next-generation computing experiences. They are seeking an engineer to lead FPGA prototyping toolchain validation and regression efforts, responsible for developing robust test cases and maintaining regression infrastructures to ensure quality and reliability of FPGA designs.
Artificial Intelligence (AI)Cloud ComputingComputerEmbedded SystemsGPUHardwareSemiconductor
No H1B
Responsibilities
Own FPGA compile/build flows (synthesis, place & route, timing closure, bitstream generation)
Develop and maintain reference FPGA designs for build flow validation
Diagnose issues across RTL, constraints, tools, and platform dependencies
Develop targeted test cases for FPGA build flows, toolchain stability, and edge cases
Build scripts and automation for software stack validation (drivers, runtimes, APIs)
Validate tool and environment changes, partner with vendors and internal teams on root cause and fixes
Define scalable design qualification criteria and coverage
Design and maintain automated daily/nightly regression systems for FPGA and software toolchain validation
Enable distributed, scalable runs across on-prem or cloud resources
Automate result collection, triage, and failure classification
Integrate FPGA regressions into the unified infrastructure and CI/CD pipelines
Interface with shared services (e.g., build orchestration, monitoring, logging)
Enable standardized reporting, dashboards, and notifications for regression health
Qualification
Required
Strong hands-on experience in FPGA build flows
Experience in design qualification
Experience in developing infrastructure for platform regressions
Ability to develop robust smoke tests, functional test cases, and qualification workloads
Experience in architecting and implementing daily and nightly regression pipelines
Ability to integrate regression pipelines into a unified infrastructure
Ensuring continuous quality and reliability of FPGA based platform design flows at scale
Ownership of FPGA compile/build flows (synthesis, place & route, timing closure, bitstream generation)
Ability to develop and maintain reference FPGA designs for build flow validation
Ability to diagnose issues across RTL, constraints, tools, and platform dependencies
Ability to develop targeted test cases for FPGA build flows, toolchain stability, and edge cases
Ability to build scripts and automation for software stack validation (drivers, runtimes, APIs)
Ability to validate tool and environment changes, partner with vendors and internal teams on root cause and fixes
Ability to define scalable design qualification criteria and coverage
Ability to design and maintain automated daily/nightly regression systems for FPGA and software toolchain validation
Ability to enable distributed, scalable runs across on-prem or cloud resources
Ability to automate result collection, triage, and failure classification
Ability to integrate FPGA regressions into the unified infrastructure and CI/CD pipelines
Ability to interface with shared services (e.g., build orchestration, monitoring, logging)
Ability to enable standardized reporting, dashboards, and notifications for regression health
Bachelors or Masters degree in computer engineering/Electrical Engineering
Preferred
Large-scale FPGA farm or datacenter-style validation
Monitoring/logging tools (e.g., Grafana, Prometheus, ELK)
Operating unified build/validation infrastructures across multiple teams
Hardware bring-up or silicon pre-/post-silicon validation
Cross-functional and geographically distributed team collaboration
Benefits
AMD benefits at a glance.
Company
AMD
Advanced Micro Devices is a semiconductor company that designs and develops graphics units, processors, and media solutions.
Founded in 1969
10001+ employees
Funding
Current Stage
Public CompanyTotal Funding
unknownKey Investors
OpenAIDaniel Loeb
2025-10-06Post Ipo Equity
2023-03-02Post Ipo Equity
2021-06-29Post Ipo Equity
Leadership Team
Lisa Su
Chair & CEO
Mark Papermaster
CTO and EVP
Recent News
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2025-12-27
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