FPGA Prototyping Toolchain Validation & Regression Lead jobs in United States
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AMD · 1 day ago

FPGA Prototyping Toolchain Validation & Regression Lead

AMD is a company focused on building innovative products that enhance computing experiences across various domains. They are seeking an engineer with strong hands-on experience in FPGA build flows and design qualification, responsible for developing robust tests and ensuring the quality of FPGA design flows.

AI InfrastructureArtificial Intelligence (AI)Cloud ComputingComputerEmbedded SystemsGPUHardwareSemiconductor
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Growth Opportunities
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Responsibilities

Own FPGA compile/build flows (synthesis, place & route, timing closure, bitstream generation)
Develop and maintain reference FPGA designs for build flow validation
Diagnose issues across RTL, constraints, tools, and platform dependencies
Develop targeted test cases for FPGA build flows, toolchain stability, and edge cases
Build scripts and automation for software stack validation (drivers, runtimes, APIs)
Validate tool and environment changes, partner with vendors and internal teams on root cause and fixes
Define scalable design qualification criteria and coverage
Design and maintain automated daily/nightly regression systems for FPGA and software toolchain validation
Enable distributed, scalable runs across on-prem or cloud resources
Automate result collection, triage, and failure classification
Integrate FPGA regressions into the unified infrastructure and CI/CD pipelines
Interface with shared services (e.g., build orchestration, monitoring, logging)
Enable standardized reporting, dashboards, and notifications for regression health

Qualification

FPGA build flowsRegression pipelinesAutomation scriptingToolchain validationMonitoring toolsSilicon validationCloud resourcesCross-functional collaboration

Required

Strong hands-on experience in FPGA build flows
Experience in design qualification
Experience in developing infrastructure for platform regressions
Ability to develop robust smoke tests, functional test cases, and qualification workloads
Experience in architecting and implementing daily and nightly regression pipelines
Ability to integrate regression pipelines into a unified infrastructure
Ensuring continuous quality and reliability of FPGA based platform design flows at scale
Ownership of FPGA compile/build flows (synthesis, place & route, timing closure, bitstream generation)
Development and maintenance of reference FPGA designs for build flow validation
Diagnosis of issues across RTL, constraints, tools, and platform dependencies
Development of targeted test cases for FPGA build flows, toolchain stability, and edge cases
Building scripts and automation for software stack validation (drivers, runtimes, APIs)
Validation of tool and environment changes
Defining scalable design qualification criteria and coverage
Design and maintenance of automated daily/nightly regression systems for FPGA and software toolchain validation
Enabling distributed, scalable runs across on-prem or cloud resources
Automating result collection, triage, and failure classification
Integration of FPGA regressions into the unified infrastructure and CI/CD pipelines
Interface with shared services (e.g., build orchestration, monitoring, logging)
Enabling standardized reporting, dashboards, and notifications for regression health
Bachelors or Masters degree in computer engineering/Electrical Engineering

Preferred

Large-scale FPGA farm or datacenter-style validation
Monitoring/logging tools (e.g., Grafana, Prometheus, ELK)
Operating unified build/validation infrastructures across multiple teams
Hardware bring-up or silicon pre-/post-silicon validation
Cross-functional and geographically distributed team collaboration

Benefits

AMD benefits at a glance.

Company

Advanced Micro Devices is a semiconductor company that designs and develops graphics units, processors, and media solutions.

Funding

Current Stage
Public Company
Total Funding
unknown
Key Investors
OpenAIDaniel Loeb
2025-10-06Post Ipo Equity
2023-03-02Post Ipo Equity
2021-06-29Post Ipo Equity

Leadership Team

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Lisa Su
Chair & CEO
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Mark Papermaster
CTO and EVP
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Company data provided by crunchbase