pSemi, A Murata Company · 7 hours ago
Technical Director, Digital Design and Verification
San Diego, CA
Full-time
Onsite
Director/Executive
$212K/yr - $292K/yr
15+ years exppSemi Corporation is a Murata company driving semiconductor integration. The Technical Director oversees the Digital Design and Verification teams, responsible for building high-performing engineering teams and ensuring high-quality project execution.
Electrical DistributionManufacturingSemiconductor
Responsibilities
Lead and manage digital design and verification teams across multiple global sites
Architect, design, and verify digital logic to meet power, performance, and area objectives
Improve team efficiency, productivity, and design quality through methodology and flow enhancements
Conduct architecture, design, and verification reviews throughout the project lifecycle
Support front-end and mid‑end tasks such as synthesis, timing closure, DFT, and ATPG
Support back-end tasks such as place-and-route, DRC, LVS, parasitic extraction, and back annotation of delays for timing closure
Support test vector generation, silicon validation, and digital characterization activities
Contribute to AMS verification and mixed‑signal product development
Identify automation and tool requirements with cross‑functional partners
Guide products through qualification and into high‑volume production
Qualification
Required
15+ years of experience in digital design and verification
5+ years of experience managing engineering teams
Strong strategic thinking and performance‑management abilities
Excellent communication and leadership skills with the ability to simplify complex concepts and mentor engineers
Proven project‑management experience across multiple concurrent programs
Broad experience in ASIC systems, digital architecture, design, verification/validation, mid/back‑end coordination, product development, and mass‑production release
Strong foundation in digital circuits, transistor‑level design, system architecture
Deep expertise in RTL/Verilog and familiarity with mid/back‑end design
Proficiency in front‑end digital design, including timing and synthesis
Experience designing state machines, serial interfaces, and integrating IP (SRAM, OTP)
Knowledge of common interface protocols (e.g., MIPI RFEE, SPI, I2C, I3C)
Experience with advanced process nodes and low‑power design techniques
Strong understanding of clock‑domain crossing, power domains, and design‑for‑low‑power
Knowledge of DSP architectures and signal‑processing ASICs
Proficiency in C/C++, C#, Perl, Python, Tcl, and Makefiles
Extensive experience with Cadence and Synopsys toolchains
Familiarity with SystemVerilog, UVM, and post‑silicon validation workflows
Knowledge of DFT, including scan and memory BIST
Preferred
Knowledge of Comm.Systems and DSP architectures in signal processing ASICs, as well as mixed signal design, including delta‑sigma modulators, discrete-time systems, z-domain analysis, digital filters and fixed‑point arithmetic implementations
Experience in modeling control loops and DSP algorithms using MATLAB/Simulink
Experience integrating and validating mixed‑signal IP and developing digital logic for calibration and control
FPGA‑based validation experience
Experience with standard‑cell library development and characterization
Experience in behavioral modeling of RF and AMS circuits for ASIC-level verification
Knowledge of UVM‑based verification techniques
Experience in IP development, integration, and semiconductor product lifecycle management
Experience working with global, cross‑functional design teams
Company
pSemi, A Murata Company
pSemi Corporation is a Murata company driving semiconductor integration.
501-1000 employees
H1B Sponsorship
pSemi, A Murata Company has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (22)
2024 (30)
2023 (28)
2022 (38)
2021 (40)
2020 (36)
Funding
Current Stage
Public CompanyTotal Funding
$92.1MKey Investors
Morgenthaler Ventures
2014-08-22Acquired
2012-08-08IPO
2004-11-02Series Unknown· $17.6M
Leadership Team
Mark L. Burgener, Ph.D.
Co-founder
Keith Bargroff
senior vice president, engineering and technology
Recent News
GlobeNewswire News Room
2025-07-08
Company data provided by crunchbase