Intel Corporation · 1 month ago
Senior DFT Design Engineer
United States
Full-time
Remote
Senior Level
$140K/yr - $263K/yr
5+ years expIntel Corporation is seeking a Senior DFT Design Engineer to develop and implement comprehensive Design for Test solutions across their semiconductor products. This role involves architecting and optimizing test strategies, collaborating with cross-functional teams, and ensuring high-quality standards for manufacturing in the semiconductor industry.
Semiconductors
Responsibilities
Develops logic design, register transfer level (RTL) coding, and simulation for DFT implementations
Provides DFT timing closure support and generates test content for manufacturing delivery
Implements various DFx content including SCAN, MBIST, and BSCAN methodologies
Applies strategies, tools, and methods to write and generate RTL and structural code for DFT integration
Participates in defining architecture and microarchitecture features for blocks, subsystems, and SoCs
Collaborates on DFT design including TAP, SCAN, MBIST, BSCAN, processor monitors, and in-system test/BIST
Integrates DFT blocks into functional IP and SoC while supporting customer integration requirements
Optimizes logic design to meet power, performance, area, timing, test coverage, DPM, and test time/vector memory reduction goals
Reviews verification plans and drives DFT design verification to achieve architecture specifications
Ensures design features are verified correctly and implements corrective measures for failing RTL tests
Develops HVM (High Volume Manufacturing) content for rapid bring-up and production ramp on ATE (Automatic Test Equipment)
Collaborates with post-silicon and manufacturing teams for silicon verification and debug support
Drives high test coverage through structural and IP-specific tests to achieve quality and DPM objectives
Documents learnings and improvement requirements for design and validation processes
Qualification
Required
Bachelor's degree in Electrical Engineering, Computer Science, or related field with 4+ years of industry experience or Master's degree in Electrical Engineering, Computer Science, or related field with 3+ years of industry experience
5+ years of hands-on experience with DFT (Design for Test) methodologies
5+ years of experience with Array Test including MBIST (Memory Built-In Self-Test)
Experience in RTL coding, simulation, and verification
Experience in semiconductor manufacturing test processes and ATE systems
Preferred
Expert-level proficiency in Tessent DFT tool suite
Advanced expertise in PrimeTime, specifically with DFT constraints and timing analysis
Experience with additional DFT tools and methodologies
Knowledge of advanced test compression techniques and fault models
Experience with SoC-level DFT integration and customer support
Background in post-silicon validation and debug
Familiarity with industry test standards and protocols
Experience in test cost optimization and DPM improvement initiatives
Benefits
Health
Retirement
Vacation
Company
Intel Corporation
Our mission is to shape the future of technology to help create a better future for the entire world, that’s the power of Intel Inside.
10001+ employees
H1B Sponsorship
Intel Corporation has a track record of offering H1B sponsorships. Please note that this does not
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Funding
Current Stage
Late StageLeadership Team
Brea Watts, MFA
Communications Manager, CEO
Carol Bartz
CEO
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