Texas Instruments · 1 day ago
Resolution Enhancement Techniques Process Development Engineer
Dallas, TX
Full-time
Onsite
Senior Level, Lead/Staff
10+ years expTexas Instruments is a global semiconductor design and manufacturing company that develops analog ICs and embedded processors. The role involves creating and optimizing OPC models for advanced technology nodes, collaborating with various teams to ensure model accuracy and quality, and implementing machine learning and optimization techniques.
ComputerDSPSemiconductor
Responsibilities
Partnering with design, process engineering and process integration teams to define design shapes needed for building accurate models
Designing parameterized mask layouts needed for model building inputs
Investigating and implementing ML and AI methods for improving model accuracy and runtime
Implementing advanced optimization techniques
Working with process engineering and process integration teams on wafer verification to validate model quality
Working with OPC verification engineers to improve the accuracy of post-OPC verification models. These include but are not limited to weak image, assist feature printing, and resist top-loss models
Troubleshooting photolithographic patterning related issues related to OPC modeling for all fabs within TI
Developing and maintaining a suite of model quality checks for unit testing. These include but are not limited to grid checks, stability tests, OPC convergence tests, and ghost contour checks
Developing models that can support multi-patterning approaches such as SADP and LELE
Qualification
Required
Masters in Electrical Engineering, Physics, Computer Science, Chemistry or related degree
10 + years experience in OPC modeling in advanced node lithography
Expertise in selecting and optimizing the features needed for properly sampling design spaces for building accurate models
Expertise in developing test requirements to validate OPC modeling solutions
Strong knowledge/understanding of advanced lithography simulation and RET techniques used in semiconductor manufacturing and process development
Preferred
Ability to lead and drive advanced processes associated with double patterning techniques in 22 nm node development
Expertise in Synopsys ProGen modeling software
Demonstrated knowledge of OPC verification software packages such as ORC, LMC+, or PLRC
Knowledge of critical care-abouts for 28 and 22 nm node processing
Familiarity with physical layout (gds/oas). Knowledge of litho/OPC test pattern design and layout execution using test pattern generators and use of layout software such as Cadence Virtuoso or KLayout
Programming experience in Unix environment
Understanding of OPC pattern validation methodologies and process window assessment techniques like KLA's Photolithography Wafer Qualification (PWQ)
Demonstrated strong analytical and problem solving skills
Strong verbal and written communication skills
Ability to work in teams and collaborate effectively with people in different functions
Strong time management skills that enable on-time project delivery
Demonstrated ability to build strong, influential relationships
Ability to work effectively in a fast-paced and rapidly changing environment
Ability to take the initiative and drive for results
Benefits
Competitive pay and benefits designed to help you and your family live your best life
Company
Texas Instruments
Texas Instruments is a global semiconductor company that manufactures, designs, tests, and sells embedded and analog processing chips.
10001+ employees
H1B Sponsorship
Texas Instruments has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (189)
2024 (184)
2023 (148)
2022 (222)
2021 (165)
2020 (179)
Funding
Current Stage
Public CompanyTotal Funding
$13.61BKey Investors
U.S. Department of Commerce
2025-05-20Post Ipo Debt· $1.2B
2024-12-20Grant· $1.61B
2024-05-28Post Ipo Equity· $2.5B
Leadership Team
Richard Templeton
President and Chief Executive Officer
Krunali Patel
Senior vice president and chief information officer
Recent News
2026-01-07
Company data provided by crunchbase