Innatera · 1 month ago
Staff SoC Verification Engineer
United States
Full-time
Hybrid
Lead/Staff
8+ years expInnatera is a rapidly growing Dutch semiconductor company that develops ultra-efficient neuromorphic processors for AI at the edge. The Staff SoC Verification Engineer will be responsible for developing verification environments, writing test sequences, debugging simulation results, and contributing to quality assurance for chip designs.
AI InfrastructureArtificial Intelligence (AI)Machine LearningSemiconductor
Responsibilities
Develop and maintain SystemVerilog/UVM-based verification environments at both module and SoC level
Write test sequences, define functional coverage models, and ensure coverage closure
Debug simulation results using waveform tools and collaborate with design teams to resolve issues
Drive constrained-random stimulus generation and continuous improvements in our verification methodology
Apply modern EDA tools and automate verification flows to maximize speed and quality
Contribute to quality assurance, release-readiness, and design-test alignment for every chip
Qualification
Required
8+ years of digital verification, including 4+ years of constrained-random verification with UVM
2+ years of embedded C development for SoC verification
Experience designing verification architecture from design specifications and creating test plans
Ability to translate functional requirements into functional coverage models
Skilled in constrained-random stimulus generation and coverage analysis/closure
Strong expertise in root-cause analysis and debugging SystemVerilog RTL
Proficiency in scripting with Python or similar languages
Solid experience with Linux, bash, or equivalent environments
Proficient with commercial EDA tools
Experience collaborating effectively with cross-functional teams
Hands-on experience with UVM verification architecture and vertical reuse of lower-level UVCs/environments
Skilled in mixed-language simulation and system modeling
Experience with effort estimation, project planning, scheduling, and tracking
Proven ability to lead and mentor a small team
Preferred
Experience with SystemC for modeling and simulation
Knowledge of UPF and low-power verification methodologies
Exposure to formal verification techniques
Hands-on experience with FPGA validation and bring-up
Experience with full-chip emulation and bring-up
Familiarity with OpenOCD/GDB for software-driven verification
Experience in SystemVerilog RTL design
Benefits
Pension plan
A flexible working environment (work-from-home policy, flexible working hours, advantageous holidays scheme)
A generous holiday scheme
Office perks like fresh fruit, snacks, and an on-site gym
Statutory commuting/home allowance
Company
Innatera
Innatera is a developer of ultra-low-power intelligence for sensors.
51-200 employees
Funding
Current Stage
Growth StageTotal Funding
$27.25MKey Investors
Invest-NLIntel Ignite
2024-06-27Series A· $5M
2024-03-19Series A· $16.29M
2021-11-19Non Equity Assistance
Leadership Team
Sumeet Kumar
Founder & CEO
Recent News
2026-01-16
businessweekly.co.uk
2026-01-06
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