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Marvell Technology · 2 hours ago

Senior Principal Engineer, Physical Design

Morrisville, NC

Full-time

Onsite

Senior Level, Lead/Staff

$171K/yr - $253K/yr

10+ years exp

Marvell Technology is a leader in semiconductor solutions that are integral to data infrastructure. The Senior Principal Engineer, Physical Design will shape the vision for physical design capabilities, lead implementation for SoC programs, and provide strategic leadership to ensure successful tapeouts of high-performance chips.

DSPInternet of ThingsManufacturingSemiconductorWireless

Growth Opportunities

No H1B

U.S. Citizen Only

Responsibilities

Shape the long-term vision for physical design capabilities and infrastructure in alignment with company-wide technology strategy

Lead RTL-to-GDSII implementation for multiple SoC programs, overseeing synthesis, floorplanning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, and physical verification (DRC/LVS)

Provide strategic leadership and technical direction to physical design teams, ensuring successful and timely tapeouts of complex, high-performance SoCs

Mentor and develop engineering talent, fostering a culture of innovation, collaboration, and continuous improvement

Oversee team structure, hiring, performance management, and career development to build and retain a high-performing physical design organization

Drive cross-functional collaboration with design teams to influence design decisions and ensure successful project execution

Navigate and resolve cross-functional conflicts effectively, fostering alignment and maintaining momentum across diverse teams

Drive the development and adoption of next-generation physical design methodologies, flows, and automation to improve productivity and design quality

Qualification

Physical design leadershipBack-end physical designSoC project managementEDA tools proficiencyAutomation scriptingStatic timing analysisASIC design flowCollaboration skillsCommunication skillsMentoring skills

Required

Bachelor's degree in Computer Science, Electrical Engineering or related fields and 15+ years of related professional experience or Master's degree in Computer Science, Electrical Engineering or related fields with 10-12 years of experience or PhD in Computer Science, Electrical Engineering or related fields with 8-10 years of experience or equivalent professional experience in lieu of a formal degree

15+ years of progressive experience in back-end physical design and verification, including significant leadership roles

Proven track record of leading and scaling physical design teams, managing complex SoC projects, and delivering high-quality tapeouts under aggressive schedules

Deep expertise in hierarchical physical design strategies, methodologies, and advanced process node challenges

In-depth understanding of current design technologies used in major foundries

Strong understanding of ASIC design flow, RTL integration, synthesis, and timing closure

In-depth knowledge of modern EDA tools and flows

Proficient in automation and scripting using Makefile, Tcl, Python, or Perl to enhance design efficiency and flow robustness

Strong communication and collaboration skills, with the ability to influence cross-functional teams and executive stakeholders

Experience in developing and deploying advanced physical design methodologies and flows

Preferred

Strong knowledge on static timing analysis (PrimeTime, Tempus), EM/IR-Drop/crosstalk analysis (PTSI, Voltus, Redhawk, PrimeRail), extraction (Quantus, StarRC), formal or physical verification (Formality, Verplex, Calibre, Hercules) a plus

Familiarity with AI/ML-driven optimization in physical design tools is a plus