Texas Instruments · 1 week ago
Resolution Enhancement Techniques (RET) Process Development Engr
Texas Instruments is a leading innovator in advanced analog/mixed-signal devices. The role of the Design Retargeting Engineer involves translating customer design intent into manufacturable layouts while applying advanced retargeting techniques, ensuring optimized physical layouts for yield and performance across various technology nodes.
ComputerDSPSemiconductor
Responsibilities
Develop and implement design retargeting strategies to bridge the gap between design intent and process capabilities
Collaborate with OPC, lithography, and process integration teams to ensure accurate pattern transfer and high-yield manufacturing
Analyze and modify layout geometries to improve printability and process window robustness
Work with EDA tools to automate retargeting flows and integrate them into the tape-out pipeline
Support customer design enablement by providing feedback on layout constraints and manufacturability guidelines
Perform data analysis using CD metrology, SEM review, and simulation results to refine retargeting rules
Contribute to the development of design rules and patterning strategies for advanced nodes (e.g., 28nm, 22nm)
Mentor junior engineers and contribute to knowledge sharing within the team
Qualification
Required
Master's in Electrical Engineering, Physics, Materials Science, or a related field
5+ years of experience in design retargeting, OPC, or physical design in a semiconductor or EDA environment
Strong understanding of optical lithography principles, RET (e.g., OPC, SRA, assist features), and mask technology
Hands-on experience with industry-standard OPC software tools (e.g., Synopsis Sentaurus Lithography, Mentor Calibre, ASML Brion)
Proficiency in scripting with any scripting languages
Familiarity with layout editing and verification tools (e.g., Calibre, Virtuoso, ICC2)
Understanding of lithography, patterning, and process integration challenges in advanced nodes
Familiarity with 28nm/22nm process limitations and lithographic constraints
Preferred
PhD in Electrical Engineering, Physics, Materials Science, or a related field
Experience with advanced technology nodes (e.g., 45nm, 28nm, 22nm, and 20nm)
Solid knowledge of semiconductor device physics and fabrication processes
Experience in analog layout interaction with lithography and OPC flows
Experience with statistical data analysis and yield improvement methodologies
Strong analytical and problem-solving skills
Ability to work effectively in a cross-functional team environment
Excellent problem-solving, analytical, and communication skills
Knowledge of design rule checking (DRC) and layout versus schematic (LVS)
Knowledge of Design Technology Co-Optimization (DTCO)
Exposure to machine learning or data-driven approaches for layout optimization
Benefits
Competitive pay and benefits designed to help you and your family live your best life
Company
Texas Instruments
Texas Instruments is a global semiconductor company that manufactures, designs, tests, and sells embedded and analog processing chips.
H1B Sponsorship
Texas Instruments has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (189)
2024 (184)
2023 (148)
2022 (222)
2021 (165)
2020 (179)
Funding
Current Stage
Public CompanyTotal Funding
$13.61BKey Investors
U.S. Department of Commerce
2025-05-20Post Ipo Debt· $1.2B
2024-12-20Grant· $1.61B
2024-05-28Post Ipo Equity· $2.5B
Leadership Team
Recent News
2026-01-09
2026-01-07
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