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Intel Corporation · 2 weeks ago

Multi-Project Wafer (MPW) Shuttle Program Manager

Hillsboro, OR

Full-time

Onsite

Mid, Senior Level

$134K/yr - $255K/yr

3+ years exp

Intel Corporation is a company of bold and curious inventors and problem solvers who create technology advancements. They are seeking a Multi-Project Wafer (MPW) Shuttle Program Manager to oversee and manage the execution of Multi-Project Wafer (MPW) Shuttles, ensuring seamless delivery and high customer satisfaction.

Semiconductors

Growth Opportunities

No H1B

Security Clearance Required

U.S. Citizen Only

Responsibilities

Lead and execute multi-project shuttles across multiple Intel technologies, ensuring timely delivery and alignment with customer requirements

Develop and implement risk mitigation strategies to manage shuttle execution challenges

Enhance onboarding processes for first-time customers and streamline document management for ease of access and understanding

Optimize and Innovate strategies and BKMs for seamless execution of end-to-end Shuttle operations

Collaborate with and coordinate among multiple subject matter experts and cross-functional teams, including Tape-out, Frames, Fab, Die Prep, and Assembly teams, to ensure alignment and success in shuttle operations

Develop roadmaps and execute strategic objectives for future shuttle projects

Foster a customer-first attitude by maintaining strong relationships and delivering high-quality service

Qualification

Silicon designRisk managementOperational planningProject managementShuttle operationsEngineering degreeDatabase managementEDA design softwareCross-functional collaborationCommunication skillsInterpersonal skills

Required

US Citizenship

Ability to obtain and maintain an active US Government clearance (TS/SCI)

Bachelor's with 4+ OR Master's with 3+ OR PhD with 1+ years experience and a degree in Engineering, Computer Science, or another STEM field of study

3+ years experience of relevant experience in silicon design, engineering project management, semiconductor shuttle operations and/or a similar role

3+ years experience risk management and operational planning

3+ years experience project management skills

Preferred

Active US Government Security Clearance

Bachelor's with 6+ OR Master's with 4+ OR PhD with 2+ years' experience and a degree in Engineering, Computer Science, or another STEM field of study

Familiarity with shuttle operations and Fab manufacturing processes

Proven track record of enhancing operation excellence and working with cross-functional teams

Prior working experience with MPW / Shuttle or test chip design tapeout desired

Proven track record of technical leadership and project execution management in the complete life cycle of a Silicon on Chip (SoC) or similar products from definition to design and tape-out

Working fluency on process technology parameters, overall semiconductor manufacturing steps from design fracture through package assembly, process characterization, physical design rules/runset

Familiarity with database management for large, multi-site design projects

Working experiences of interfacing with process, design, and design automation teams

Good understanding of leading-edge process technologies, devices, and the interactions with circuit design

Familiar with SoC, CPU and custom (analog and digital) design styles, flows, tools, and methodologies

Familiar with EDA design software for VLSI layout and physical verification

Excellent communication and interpersonal skills, with the ability to work effectively with cross-functional teams