Programmers.io · 4 weeks ago
Analog Layout Engineer
Programmers.io is seeking an Analog Layout Engineer to join their team. The role involves working closely with circuit designers to deliver high-quality analog layouts and requires proficiency in advanced CAD tools and design verification processes.
Responsibilities
Knowledge of analog/mixed-signal IP (e.g., SERDES PHY, transmitter and receiver, PLL, DDR PHY, ADCs, DACs, LDOs, etc.)
Experienced working with the circuit designer or layout lead to plan/schedule work and negotiate any layout trade-offs as needed
Reviewing and analyzing floor-plans and complex circuits with circuit designers
Running complete set of design verification tools available
Great understanding and experience using advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent matching performance, area and power requirements
Experienced in crafting well-matched, low noise, and low power analog blocks consisting of transistors, resistors, capacitors, pad IO's, ESD structures, etc
Must understand issues of IR drop, RC delay, electro-migration, self-heating and coupling capacitance
Must recognize failure prone circuit and layout structures, have experience with analog and DFM standard methodologies, and enthusiastically work with circuit designer or layout lead for the best approach to problems
High level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc., reports
Knowledge of CADENCE Virtuoso and MENTOR GRAPHICS layout tools
Qualification
Required
Knowledge of analog/mixed-signal IP (e.g., SERDES PHY, transmitter and receiver, PLL, DDR PHY, ADCs, DACs, LDOs, etc.)
Experienced working with the circuit designer or layout lead to plan/schedule work and negotiate any layout trade-offs as needed
Reviewing and analyzing floor-plans and complex circuits with circuit designers
Running complete set of design verification tools available
Great understanding and experience using advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent matching performance, area and power requirements
Experienced in crafting well-matched, low noise, and low power analog blocks consisting of transistors, resistors, capacitors, pad IO's, ESD structures, etc
Must understand issues of IR drop, RC delay, electro-migration, self-heating and coupling capacitance
Must recognize failure prone circuit and layout structures, have experience with analog and DFM standard methodologies, and enthusiastically work with circuit designer or layout lead for the best approach to problems
High level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc., reports
Knowledge of CADENCE Virtuoso and MENTOR GRAPHICS layout tools
Company
Programmers.io
IBM i is evolving. And so are we.
H1B Sponsorship
Programmers.io has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2023 (2)
Funding
Current Stage
Late StageRecent News
linkedin.com
2025-12-12
linkedin.com
2025-12-08
Company data provided by crunchbase