Qualcomm · 1 week ago
Low Power Design/Methodology Engineer
San Diego, CA
Full-time
Onsite
Mid Level
$140K/yr - $210K/yr
3+ years expQualcomm Technologies, Inc. is a leading company in the engineering sector, specifically in ASIC engineering. They are seeking a Low Power Design/Methodology Engineer responsible for designing power management solutions, collaborating with various teams to integrate low power features into SoC products, and enhancing methodologies throughout the design cycle.
Artificial Intelligence (AI)Generative AISoftwareTelecommunicationsWireless
Responsibilities
Design adaptive power management controller, on-chip sensor controller and digital power meter
Perform RTL design, simulation, synthesis, timing analysis, lint check, clock domain crossing check, conformal low power check, and formal verification for IP blocks
Work closely with technology/circuit design team to close IP block specification/requirement
Work closely with verification/physical design team to complete the IP design implementation
Support SoC team to integrate low power / power management IP solution into wireless SoC chips and front-end design flows
Work closely with system/software/test team to enable the low power feature in wireless SoC product
Work closely with system/software/test team to enable functional safety feature in automotive SoC product
Create/Enhance low power methodologies covering entire design cycle from RTL to GDS
Analyze how a new methodology will affect different phases of the design/verification cycle and work on fixing any issues
Provide feedback for low-power chip and system architecture
Understand and perform block & chip-level power analysis
Understand and create block-level power models
Qualification
Required
3 years of experience doing low power digital ASIC design
Familiar with ASIC front-end design process and related flow, including u-arch, RTL coding, simulation, synthesis, STA
Familiar with scripting languages like Python, Perl, TCL
Understanding of electrical engineering concepts, circuit analysis and logic design skills
Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience
Preferred
Previous experience in AVS (adaptive voltage scaling) desired
Familiarity with advanced low power techniques and tools such as UPF, CLP, power aware DV and high speed clocking desired
Proficiency in Verilog/System Verilog coding, verification techniques, and scripting language, such as: Perl, Python, Tcl, and Make etc
Good understanding of SoC architecture/micro-architecture
Understanding of automotive functional safety standard ISO 26262 and analysis technique (FMEA/FMEDA) is a plus
Strong debugging capabilities at simulation, emulation, and Silicon environments, including ability to design interesting debug experiments
Collaborate closely with cross-function team to research, design and implement performance and power management strategy for product roadmap
Benefits
Competitive annual discretionary bonus program
Opportunity for annual RSU grants
Highly competitive benefits package designed to support your success at work, at home, and at play
Company
Qualcomm
Qualcomm designs wireless technologies and semiconductors that power connectivity, communication, and smart devices.
10001+ employees
H1B Sponsorship
Qualcomm has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (2013)
2024 (1910)
2023 (3216)
2022 (2885)
2021 (2104)
2020 (1181)
Funding
Current Stage
Public CompanyTotal Funding
$3.5M1991-12-20IPO
1988-01-01Undisclosed· $3.5M
Leadership Team
Cristiano Amon
President and Chief Executive Officer
I
Isaac Eteminan
CEO
Recent News
Android Authority
2026-01-09
2026-01-09
PYMNTS.com
2026-01-08
Company data provided by crunchbase