SOC Infrastructure/NoC, Power and Performance Validation Engineer jobs in United States
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Qualcomm · 1 month ago

SOC Infrastructure/NoC, Power and Performance Validation Engineer

positionSan Diego, California, United States of America
timeFull-time
remoteOnsite
seniorityMid, Senior Level
money$116K/yr - $173K/yr
date2+ years exp

Qualcomm Technologies, Inc. is seeking a SOC Infrastructure/NoC, Power and Performance Validation Engineer to join their validation team within the Global SoC digital hardware organization. The role involves ensuring the quality of SoC silicon through collaboration with various engineering teams and requires expertise in digital design fundamentals and performance validation.

Artificial Intelligence (AI)Generative AISoftwareTelecommunicationsWireless
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Comp. & Benefits
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H1B Sponsor Likelynote

Responsibilities

SOC Bandwidth, QoS, Latency and Throughput analysis
Interconnect architectures - NoCs,AXI, AHB etc. Knowledge of upstream and downstream operations and the ability to write programs to stress their transactions for appropriate coverage
Solid expertise in various FIFO designs and related performance/functionality aspects
Come up with thorough performance validation plans and work closely with team members to ensure Performance-Power trade-offs are factored in
System Low power modes
Dynamic clock and voltage scaling operations
Interrupt architecture
Debug architecture - interactions with JTAG based debuggers, state dump scripts
Performance monitor architecture
Thorough understanding of CPU and DDR concepts, Mumtimedia, GPU, Peripheral
Memory hierarchy and caches - coherency, consistency (ordering), memory types and attributes, synchronization & semaphores, full-system concurrency, MTE, MPAM
Experience in embedded systems/expertise in C, C++, Python and assembly languages
Design and Implementation of drivers and test content
Debugging low level software and hardware issues
Fundamental understanding of Static, Leakage and Dynamic power in a semiconductor design
Familiarity in debug tools including JTAG and kernel debuggers
Structured program development concepts
Logical thinking and problem-solving ability with focus on Power, Performance and SoC System feature validation

Qualification

SOC Bandwidth analysisInterconnect architecturesFIFO designs expertisePerformance validation plansEmbedded systems expertiseCC++PythonDebug architectureLow power modesLogical thinkingStructured program developmentProblem-solving ability

Required

SOC Bandwidth, QoS, Latency and Throughput analysis
Interconnect architectures - NoCs, AXI, AHB etc. Knowledge of upstream and downstream operations and the ability to write programs to stress their transactions for appropriate coverage
Solid expertise in various FIFO designs and related performance/functionality aspects
Come up with thorough performance validation plans and work closely with team members to ensure Performance-Power trade-offs are factored in
System Low power modes
Dynamic clock and voltage scaling operations
Interrupt architecture
Debug architecture - interactions with JTAG based debuggers, state dump scripts
Performance monitor architecture
Thorough understanding of CPU and DDR concepts, Multimedia, GPU, Peripheral
Memory hierarchy and caches - coherency, consistency (ordering), memory types and attributes, synchronization & semaphores, full-system concurrency, MTE, MPAM
Experience in embedded systems/expertise in C, C++, Python and assembly languages
Design and Implementation of drivers and test content
Debugging low level software and hardware issues
Fundamental understanding of Static, Leakage and Dynamic power in a semiconductor design
Familiarity in debug tools including JTAG and kernel debuggers
Structured program development concepts
Logical thinking and problem-solving ability with focus on Power, Performance and SoC System feature validation
Bachelor's degree in Science, Engineering, or related field and 5+ years of ASIC Design, Validation, Verification, or related work experience
Master's degree in Science, Engineering, or related field and 4+ years of ASIC Design, Validation, Verification, or related work experience
PhD in Science, Engineering, or related field and 3+ years of ASIC Design, Validation, Verification, or related work experience
Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience
PhD in Science, Engineering, or related field

Benefits

Competitive annual discretionary bonus program
Opportunity for annual RSU grants
Highly competitive benefits package designed to support your success at work, at home, and at play

Company

Qualcomm

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Qualcomm designs wireless technologies and semiconductors that power connectivity, communication, and smart devices.
dateFounded in 1985
location
San Diego, California, USA
people-size10001+ employees
web-link
http://www.qualcomm.com

H1B Sponsorship

Qualcomm has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (2013)
2024 (1910)
2023 (3216)
2022 (2885)
2021 (2104)
2020 (1181)

Funding

Current Stage
Public Company
Total Funding
$3.5M
1991-12-20IPO
1988-01-01Undisclosed· $3.5M

Leadership Team

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Cristiano Amon
President and Chief Executive Officer
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Isaac Eteminan
CEO
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