Samsung Research America (SRA) · 1 day ago
Senior Engineer, SoC Architect - Memory Subsystem
Samsung Research America is focused on innovative SoC architecture for future Galaxy products. The role involves leading the architecture of next generation SoCs, specifically in the areas of Fabric, System Cache, and DRAM controller, while collaborating with various teams to ensure performance and power efficiency.
Consumer ElectronicsDigital SignageInformation TechnologyMedical DeviceSoftware
Responsibilities
Guide on development of innovative Fabric, System cache, and DRAM controller Architectural and microarchitectural features to boost power and performance on various targeted workloads in next generation SOCs
Identify and deliver Fabric, System cache, and DRAM controller subsystem architecture proposals for products in new and existing markets
Evaluate architecture proposal benefits in collaboration with the team of SoC Architects and communicate the results across related engineering audiences (SW, HW, Architecture, Leadership)
Perform high-level performance modeling/simulation and analysis of Fabric, System cache, and DRAM controller features, applications, benchmarks, and complex use cases
Direct and orchestrate performance modeling, and studies to support inclusion of these features in the next generation “Fabric, System cache and DRAM controller” microarchitecture based on performance, area or power improvement
Deliver architecture/microarchitecture proposals and specifications to the design team and articulate them effectively across audiences ranging from hardware & software engineers to architecture community peers, and to technology leadership
Collaborate with silicon bring-up and product teams to verify and debug the proposal and its delivered performance
Collaborate across teams to bring microarchitectural proposals to fruition across the SOC, Driver, OS, and System through detailed documentation
Qualification
Required
BSc, Master's, or PhD in Computer Science/Engineering, or equivalent combination of education, training, and experience
3+ years of experience in SOC or ASIC design and architecture
Understanding of memory controller architecture, memory scheduling, prioritization and QoS
Detailed knowledge of ARM bus infrastructure (ACE/AXI/AHB)
Fluid knowledge of one or more JEDEC standards, such as LPDDR, DDR, or HBM, and the ability to analyze such standards and drive recommendations
Background in memory systems and computer architecture to understand the tradeoffs among memory bandwidth, latency, performance, power, and SoC area
Preferred
Prior direct academic and/or work experience in Fabric/NoC, System Cache, DRAM controller Architect or microarchitecture is a plus
Experience with BookSim Simulator
Experience with Platform Architect
Benefits
Annual bonus eligibility
Generous benefits to help you live life well
Company
Samsung Research America (SRA)
Founded in October 1988, Samsung Research America (SRA) builds upon Samsung’s 40-year history in the Bay Area.
H1B Sponsorship
Samsung Research America (SRA) has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (70)
2024 (56)
2023 (71)
2022 (102)
2021 (69)
2020 (120)
Funding
Current Stage
Late StageRecent News
2025-10-31
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