Senior Principal Switch Architect jobs in United States
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Marvell Technology · 3 days ago

Senior Principal Switch Architect

Marvell Technology is a leader in semiconductor solutions that are integral to data infrastructure. The Senior Principal Switch Architect will be responsible for defining the architecture of next-generation data center switch ASICs, collaborating with various engineering teams, and driving the technical direction of the Teralynx product line.

DSPInternet of ThingsManufacturingSemiconductorWireless
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Growth Opportunities
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H1B Sponsor Likelynote
Hiring Manager
Jeff Shiverdaker
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Responsibilities

Define new features, pipelines, and protocols for next-generation data center switch chips
Deliver detailed behavioral and performance models to validate architectural decisions and ensure scalability for cloud-scale deployments
Drive end-to-end switch architecture from high-level concept through micro-architecture engagement and silicon bring-up
Partner with cross-functional engineering teams to ensure architectural intent is delivered through implementation and verification
Analyze tradeoffs across latency, throughput, memory architecture, power, area, and QoS to guide design decisions
Participate in customer-facing technical discussions, aligning product capabilities with real-world use cases and requirements
Contribute to long-term architectural direction and roadmap planning for the Teralynx product line
Mentor engineers, share best practices, and elevate architectural rigor across the organization

Qualification

ASIC architectureLayer 2 / Layer 3 forwardingBehavioral modelingPerformance modelingC/C++ programmingPython programmingNetworking protocolsTechnical leadershipCollaboration skillsCommunication skills

Required

Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, or related field and 15+ years of relevant experience, OR
Master's/PhD with 10–12+ years of experience in semiconductor architecture or ASIC development
Strong background designing or architecting complex ASICs, ideally in networking or switch domains
Deep knowledge of Layer 2 / Layer 3 forwarding, QoS, congestion management, and networking protocols
Expertise with behavioral and performance modeling, architectural validation, and system-level tradeoff analysis
Strong programming skills in C/C++ and Python
Demonstrated ability to collaborate effectively across geographies and multi-disciplinary engineering teams
Excellent communication skills with the ability to explain complex architectural concepts clearly and persuasively

Preferred

Experience with multi-die / chiplet architectures, die-to-die interfaces, or advanced packaging
Familiarity with switch pipeline architectures, buffer management, traffic engineering, and programmable datapaths
Experience engaging with customers or standards bodies
Published papers, patents, or previous leadership roles in architecture teams

Benefits

Flexible time off
401k
Year-end shutdown
Floating holidays
Paid time off to volunteer

Company

Marvell Technology

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We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology.

H1B Sponsorship

Marvell Technology has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (242)
2024 (186)
2023 (154)
2022 (210)
2021 (210)
2020 (165)

Funding

Current Stage
Public Company
Total Funding
unknown
2017-01-20Post Ipo Equity
2016-05-13Post Ipo Equity
2015-02-05Acquired

Leadership Team

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Matthew Murphy
Chairman and CEO
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Radha Nagarajan
SVP & CTO, Optical Engineering
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