Netpreme · 1 month ago
Member of Technical Staff, ASIC Design
Santa Clara, CA
Full-time
Onsite
Senior Level
5+ years expNetpreme is an early-stage startup focused on advanced ASIC design in the Artificial Intelligence and Data Center space. They are seeking experienced Senior ASIC Designers to lead technical execution and collaborate cross-functionally to deliver innovative products.
Computer Software
Responsibilities
As part of the Silicon Design Team, responsible for RTL design of IPs, subsystems and SOCs supporting Netpreme's silicon roadmap
Provide technical leadership in defining IP/SOC microarchitecture specifications, and design methodologies. Conduct design reviews to ensure adherence to best practices
Guide the team in optimizing the design to meet aggressive performance, power and area goals using advanced architectural and design techniques
Drive effective and seamless collaboration with partner teams across architecture, verification, physical design, firmware, DFT, and post silicon domains to ensure successful system level functionality
Interface with external IP vendors, foundries and EDA tool providers to ensure dependencies and roadblocks are addressed in a timely fashion to support team deliverables
Qualification
Required
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field
Minimum of 5+ years of ASIC/SOC digital design experience
Excellent leadership, communication, team building and stakeholder management skills
Ability to coordinate across multiple projects, manage risks and escalations, and work under tight schedules and budget constraints
Strong knowledge across the full ASIC/SOC development cycle from microarchitecture development to tape-out in advanced process technologies
Outstanding technical expertise in microarchitecture development, RTL coding (Verilog/SystemVerilog), synthesis, STA/timing closure, physical design, and verification methodologies
Hands-on design experience in one or more industry standards/protocol stacks such as Ethernet, UCIe, UALink etc
Demonstrated ability to optimize designs for PPA (power, performance, area) and to integrate major subsystems (interconnect, I/O, memory)
Proficiency with front-end development tools/methodologies, and scripting for automation and flow integration
Design and tapeout of any advanced silicon device is highly preferred
Preferred
PhD in Electrical Engineering, Computer Engineering, or a related field
Experience managing relationships with external design partners, IP vendors, and foundries
Knowledge of Design-For-Testability, post silicon debug/validation/manufacturing test
Benefits
Comprehensive benefits including health, dental, vision, and life insurance
Relocation assistance and visa sponsorship
Perks include a daily lunch stipend, 401k match, and more
Company
Netpreme
Empowering AI Systems with Supreme Networking
11-50 employees
Funding
Current Stage
Early StageCompany data provided by crunchbase