Marvell Technology · 17 hours ago
Senior Distinguished Engineer
Santa Clara, CA
Full-time
Onsite
Senior Level, Lead/Staff
$224K/yr - $336K/yr
15+ years expMarvell Technology is a leading semiconductor company focused on data infrastructure solutions. The Senior Distinguished Engineer will serve as a principal architect for advanced networking ASICs, defining long-term architectural roadmaps and pioneering innovations that drive performance and scalability in the semiconductor industry.
DSPInternet of ThingsManufacturingSemiconductorWireless
Hiring Manager
Jeff Shiverdaker
Responsibilities
Serve as the principal architect for advanced networking ASICs focused on performance, scale-out capabilities, power efficiency, and silicon leadership
Define long-term architectural roadmaps for Marvell's next-gen switching platforms serving AI clusters, hyperscale cloud, carrier, and enterprise markets
Architect multi-die systems, including die-to-die (D2D) high-bandwidth interconnects that redefine how large-scale ASICs are built
Champion chiplet-based methodologies that increase design modularity, accelerate development cycles, and unlock new product families
Partner closely with hardware, software, packaging, validation, and system engineering teams to deliver coherent, system-level solutions
Represent the architecture function in executive-level technical reviews and customer engagements
Mentor senior and junior engineers, helping develop the next generation of Marvell’s technical leaders
Foster a culture of innovation, rigor, and forward-looking design across the organization
Qualification
Required
Bachelor's degree in Electrical Engineering, Computer Engineering, or related field required
15+ years of experience in ASIC architecture and design, preferably in networking, switching, or high-performance SoCs
Demonstrated leadership in driving complex ASIC or multi-die products from concept through delivery
Strong track record of innovation at scale—patents, publications, or industry-recognized contributions
Deep expertise in system-level architecture for networking ASICs
Deep expertise in multi-die systems and advanced die-to-die protocols
Deep expertise in chiplet/heterogeneous integration techniques
Deep expertise in high-performance switching pipelines, memory subsystems, packet processing, traffic management and buffer management
Strong understanding of system software interaction, control-plane integration, and full-stack implications
Exceptional communication and influence skills—able to drive alignment at senior levels
Comfortable operating in a fast-paced, highly innovative environment
Proven mentoring capabilities with a passion for developing engineering talent
Preferred
Master's or Ph.D. strongly preferred
Benefits
Employee stock purchase plan with a 2-year look back
Family support programs to help balance work and home life
Robust mental health resources to prioritize emotional well-being
Recognition and service awards to celebrate contributions and milestones
Company
Marvell Technology
We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology.
5001-10000 employees
H1B Sponsorship
Marvell Technology has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (242)
2024 (186)
2023 (154)
2022 (210)
2021 (210)
2020 (165)
Funding
Current Stage
Public CompanyTotal Funding
unknown2017-01-20Post Ipo Equity
2016-05-13Post Ipo Equity
2015-02-05Acquired
Leadership Team
Matthew Murphy
Chairman and CEO
Radha Nagarajan
SVP & CTO, Optical Engineering
Recent News
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