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AMD · 1 day ago

ASIC Design Engineer, GPU/ML Shader Core

Santa Clara, CA

Full-time

Onsite

Mid Level

$160K/yr - $240K/yr

AMD is a company focused on building innovative products that enhance computing experiences. They are seeking an ASIC Design Engineer for GPU/ML Shader Core who will be responsible for micro-architecting and designing GPU and ML/AI shader IP, collaborating with various teams to ensure optimal performance and efficiency.

AI InfrastructureArtificial Intelligence (AI)Cloud ComputingComputerEmbedded SystemsGPUHardwareSemiconductor

Growth Opportunities

No H1B

Responsibilities

Collaborate with block architect, ASIC designers and verification engineers to define and document block micro-architecture and analyze architectural trade-offs based on features, performance requirements and system limitations

Responsible for owning full design cycle from defining micro-architecture, implementing RTL, and deliver fully verified and PD timing clean design

Consult DV engineers in describing features, outlining test plans, and closing on coverage

Assist DV engineers to debug functional, performance or power test failures

Work with Physical Design team to close on timing, area and power requirements

Qualification

Micro-architectureRTL developmentASIC design flowVerilogDigital systemsVLSI designInterpersonal skillsTeam collaboration

Required

Experience in micro-architecture and RTL development (Verilog), focused on GPU/CPU/ML/AI pipelines, arbiters, scheduling, synchronization & bus protocols, interconnect networks and/or caches

Good understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis

Exposure to Digital systems and VLSI design, Computer Architecture, Computer Arithmetic, CMOS transistors and circuits is required

Undergraduate degree required