Lead Graphics Memory Power Architect, Performance Optimization jobs in United States
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AMD · 2 hours ago

Lead Graphics Memory Power Architect, Performance Optimization

AMD is a company focused on building innovative products that enhance computing experiences across various domains. The Lead Graphics Memory Power Architect will lead power optimization efforts for memory components in next-generation GPU and APU products, collaborating with cross-functional teams to achieve industry-leading performance and efficiency.

Artificial Intelligence (AI)Cloud ComputingComputerEmbedded SystemsGPUHardwareSemiconductor
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Growth Opportunities
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Responsibilities

Architect and implement power optimization strategies for memory subsystems including cache hierarchies, compression engines, coherency protocols, and interconnects
Collaborate with RTL, PD, software, and modeling teams to define and validate architectural features that improve PPA
Analyze game traces and real-world workloads to identify power hotspots and propose mitigation strategies
Develop and maintain power models for memory subsystems and validate against silicon measurements
Lead architectural reviews and provide technical guidance on Di/Dt mitigation, clock gating, power gating, and wake-up latency
Contribute to architectural specifications and programming guides, including power chapters
Engage with internal stakeholders and external partners to align on power goals and trade-offs
Guide HW Design teams in evaluating and improving power efficiency of their implementations

Qualification

Memory architecturePower optimization strategiesPower modeling toolsGPU architectureScripting languagesAnalytical skillsCommunication skillsTeamwork skillsProblem-solving skills

Required

Passion for modern, complex GFX architecture and digital design
Excellent communication skills and experience collaborating with other engineers located in different sites/time zones
Strong analytical and problem-solving skills
Willingness to learn and ready to take on problems
Accomplished listener who can analyze, abstract, communicate, and converge on the best ideas
Develop strong partnerships with product stakeholders across the organization and development partners outside the organization
Excellent verbal communication and written, presentation skills
Excellent interpersonal, organizational, analytical, planning, and teamwork skills
A drive to continuously learn and expand architectural breadth and depth
Architect and implement power optimization strategies for memory subsystems including cache hierarchies, compression engines, coherency protocols, and interconnects
Collaborate with RTL, PD, software, and modeling teams to define and validate architectural features that improve PPA
Analyze game traces and real-world workloads to identify power hotspots and propose mitigation strategies
Develop and maintain power models for memory subsystems and validate against silicon measurements
Lead architectural reviews and provide technical guidance on Di/Dt mitigation, clock gating, power gating, and wake-up latency
Contribute to architectural specifications and programming guides, including power chapters
Engage with internal stakeholders and external partners to align on power goals and trade-offs
Guide HW Design teams in evaluating and improving power efficiency of their implementations
An undergraduate degree is required

Preferred

Strong understanding of memory architecture: caches (L1/L2), DRAM interfaces, coherency, compression, and selective coherence
Experience with power modeling tools and methodologies
Familiarity with GPU architecture and shader workloads
Ability to analyze RTL and system-level power behavior
Proficiency in scripting and modeling languages (Python, C, RTL)
Excellent communication and collaboration skills across time zones and disciplines

Benefits

AMD benefits at a glance.

Company

Advanced Micro Devices is a semiconductor company that designs and develops graphics units, processors, and media solutions.

Funding

Current Stage
Public Company
Total Funding
unknown
Key Investors
OpenAIDaniel Loeb
2025-10-06Post Ipo Equity
2023-03-02Post Ipo Equity
2021-06-29Post Ipo Equity

Leadership Team

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Lisa Su
Chair & CEO
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Mark Papermaster
CTO and EVP
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Company data provided by crunchbase