Acceler8 Talent ยท 3 weeks ago
System on a Chip Architect
Acceler8 Talent is seeking a highly experienced SoC Architect to lead the design and definition of modular compute platforms leveraging chiplet integration at an AI hardware startup. This role will focus on chiplet-based AI accelerators, driving architectural decisions around high-bandwidth I/O, memory connectivity, and scalable inter-chiplet protocols for next-generation AI systems.
Responsibilities
Define SoC architecture for chiplet-based AI inference platforms, including inter-chiplet data paths, protocols, and synchronization strategies
Drive partitioning decisions between compute, I/O, memory, and control chiplets
Architect PCIe and DMA interfaces to bridge host systems and chiplet domains
Specify die-to-die interconnect requirements (bandwidth, latency, power) and collaborate with packaging and PHY teams
Integrate and verify third-party IPs for I/O, memory, and inter-chip communication
Support bring-up and debug of multi-chip systems
Qualification
Required
BS/MS/Ph.D. in EE or CS with 10+ years of SoC or multi-die system experience
Proven experience in chiplet-based design, with familiarity in technologies such as UCIe, EMIB, Foveros, or equivalent
Strong understanding of modular SoC partitioning and die-to-die interconnect architectures
Expertise in PCIe Gen 4/5, RISC-V subsystems, and high-performance memory interfaces (LPDDR4/5, HBM)
Experience with chiplet-aware system bring-up and verification methodologies
Proficiency in SystemVerilog