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Google · 2 weeks ago

Physical Design Engineer, 3D Technology, PhD, University Graduate

Sunnyvale, CA

Full-time

Onsite

Entry, Mid Level

$132K/yr - $189K/yr

Google is a leading tech company, and they are seeking a Physical Design Engineer specialized in 3D Technology. In this role, you will drive the development of 3D technology platforms for custom ASICs and SoCs, collaborating with various teams to optimize design methodologies and ensure product success.

AppsArtificial Intelligence (AI)Cloud StorageSearch EngineSEO

Growth Opportunities

H1B Sponsor Likely

Responsibilities

Drive development of a leading edge 3D technology platform for custom, high performance ASIC’s and SoC’s, from design through manufacturing, packaging, and test

Optimize digital blocks for performance, power, area, and reliability using physical design and circuit techniques

Define optimal methodologies by investigating performance, power, and area across different technology nodes and implementation techniques

Work with our physical design, technology, circuits, and architecture teams and IP partners in advanced Complementary Metal-Oxide-Semiconductor (CMOS) nodes

Design and build custom circuits at the transistor and gate levels to support physical design and floorplan optimization

Qualification

Physical design experience3D integration technologiesChip design toolsFinFET technologyDigital place-RouteProgramming/scriptingPPA design trade-offsStandard cells understandingCommunication skillsPresentation skills

Required

PhD degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience

Academic, educational, internship, or project experience with physical design and 3D integration technologies such as 3D-IC, 2.5D, chip stacking, vertical stacking, integrity, or Through-Silicon Vias (TSV)

Experience with running industry standard tools for chip design (e.g., from Synopsys, Cadence, or Siemens EDA)

Preferred

Experience with advanced finfet and gate-all-around technology nodes, and enabling physical design flows in these nodes

Experience in delivering optimized digital place-and-route blocks leading to test chip or product tapeouts

Experience with programming/scripting (TCL, Python, or Perl)

Expertise with Power, Performance, and Area (PPA) design trade-offs and optimizations in physical design spaces

Understanding of standard cells, SRAMs, power, noise, and IR analysis

Excellent presentation and communication skills

Benefits

Bonus

Equity

Benefits

Company

Google

Glassdoor4.4

Google specializes in internet-related services and products, including search, advertising, and software. It is a sub-organization of Alphabet.

Founded in 1998

Mountain View, California, USA

10001+ employees

https://www.google.com

H1B Sponsorship

Google has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)

Distribution of Different Job Fields Receiving Sponsorship

Represents job field similar to this job

Trends of Total Sponsorships

2025 (8763)

2024 (8872)

2023 (9682)

2022 (11626)

2021 (9109)

2020 (9785)

Funding

Current Stage

Public Company

Total Funding

$26.1M

Key Investors

Andy Bechtolsheim

2004-08-19IPO

1999-06-07Series Unknown· $25M

1998-11-01Angel· $1M

Leadership Team

Sundar Pichai

CEO

Thomas Kurian

CEO - Google Cloud

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