Riverlane · 3 days ago
Senior Digital Design Engineer
Riverlane is a company focused on making quantum computing useful, and they are seeking a Senior Digital Design Engineer to help develop their quantum error correction stack. The role involves implementing QEC decoders, mentoring junior engineers, and collaborating with software and verification teams to deliver innovative solutions.
ComputerInformation TechnologyQuantum ComputingSoftware
Responsibilities
Implementation of QEC decoders on hardware
Implementation of low-latency, high throughput data movement between cards and IPs; or
Design of low-latency interfaces to bring data in the systems
Mentor junior engineers (not a manager role-no direct reports)
In all of the above, you will (often from scratch) design end to end or integrate complex IPs and develop tests, collaborating closely with our Software, Verification and Testing experts to deliver an outstanding product
Qualification
Required
5+ years of end to end design experience with complex, state-of-the-art FPGA platforms (e.g. AMD/Xilinx MPSoCs/RFSoCs, Altera Stratix 7 or Stratix 10)
Experience mentoring junior hardware design engineers
Proven professional experience in at least one of the following areas: Customization of RISC-V CPUs e.g. addition of new instructions and associated hardware accelerators
Implementation of modern classical decoders on FPGA/ASIC e.g. LDPC, turbo-codes
Implementation of high-speed serial communication links across multiple FPGAs, or PCIe-based communication links
Implementation of quantum control systems, or quantum decoders
Architecture of System on Chip (SoC) solutions, with at least one CPU and custom accelerators
Proven capability to test, debug and improve complex systems
Ability to convert product requirements into technical specifications to document and share your work
A curious nature and a passion for learning and continuous improvement
Excellent communication skills, with the ability to work both independently and collaboratively as part of a team
Preferred
Experience with ASIC environments (<48nm)
Customer facing experience (technical sales, consulting experience)
Benefits
Annual bonus scheme
Private health insurance
Life insurance
Contributory retirement fund
Equity
Generous annual leave
Enhanced family leave
Training and conference budgets
Company
Riverlane
Riverlane develops software solutions to harness the power of quantum computers for practical applications.
Funding
Current Stage
Growth StageTotal Funding
$120.68MKey Investors
Planet First PartnersEuropean Innovation CouncilInnovate UK
2024-08-06Series C· $75M
2024-05-01Grant· $2.63M
2024-03-11Grant
Recent News
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2025-12-11
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