Astera Labs · 2 weeks ago
Technical Lead Power Engineer
San Jose, CA
Full-time
Onsite
Senior Level
$170K/yr - $195K/yr
5+ years expAstera Labs is a provider of rack-scale AI infrastructure through purpose-built connectivity solutions. The Technical Lead Power Engineer will be responsible for designing and optimizing power delivery systems for ASIC products, ensuring robust power integrity, and developing board-level designs.
AutomotiveElectronicsIntelligent SystemsSemiconductor
Responsibilities
Develop and optimize power conversion circuits, including DC-DC converters, voltage regulators, and power modules
Design high-efficiency, high-reliability power circuits including:
Buck / boost / buck-boost converters
Multiphase regulators
Hot-swap, protection, and sequencing circuits
Design and optimize power delivery for ASICs, ensuring stable voltage and current distribution across the board. Address power integrity challenges such as voltage ripple, noise, and impedance of mismatches
Perform power integrity, transient response, stability, and thermal analysis
Evaluate and select appropriate power components, such as voltage regulators, capacitors, and inductors, ensuring they meet performance, thermal, and reliability specifications. Also, will be asked to do the same evaluation on overall system level design components
Work closely with component vendors to identify and source the best power solutions, ensuring compatibility with our ASIC designs and meeting quality standards
Work closely with cross-functional teams, including firmware, mechanical, and validation engineers, to integrate designs into complete systems
Generate and maintain comprehensive design documentation, including, Specifications, schematics and BOMs
Conduct thorough debugging and analysis of power-related or system level issue utilizing lab equipment such as oscilloscopes and power analyzers to identify and resolve problems
Qualification
Required
Bachelor's or Master's degree in electrical engineering or related field
5-8 years of experience in power and board design engineering, with a focus on ASIC or high-speed digital designs
Proficiency in Cadence OrCAD and Allegro for schematic capture and PCB layout
Strong understanding of power integrity principles and techniques
Experience with power component selection and vendor collaboration
Hands-on experience with debugging power-related issues using lab equipment
Proficiency with lab equipment (oscilloscopes, electronic loads, spectrum analyzers)
Excellent problem-solving and analytical skills
Strong communication and teamwork abilities
Ability to work in a fast-paced, collaborative environment
Preferred
Familiarity with high-speed interfaces such as PCIe, DDR, and USB
Familiarity with electromagnetic interference (EMI) and electromagnetic compatibility (EMC) considerations
Familiarity with Design for Manufacturability (DFM) considerations
Experience in thermal management and reliability analysis
Company
Astera Labs
Astera Labs is a semiconductor company that provides connectivity solutions for intelligent systems.
201-500 employees
H1B Sponsorship
Astera Labs has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (50)
2024 (44)
2023 (17)
2022 (26)
2021 (14)
2020 (7)
Funding
Current Stage
Public CompanyTotal Funding
$206.35MKey Investors
Fidelity
2024-03-20IPO
2022-11-17Series D· $150M
2021-09-27Series C· $50M
Leadership Team
Jitendra Mohan
CEO
Casey Morrison
Chief Product Officer, Co-Founder
Recent News
The Motley Fool
2026-01-07
2025-12-29
Company data provided by crunchbase