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SpaceX · 15 hours ago

Principal ASIC Design Engineer (Silicon Engineering)

Redmond, WA

Full-time

Onsite

Lead/Staff

$200K/yr - $270K/yr

10+ years exp

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. In this role, the Principal ASIC Design Engineer will develop cutting-edge next-generation FPGAs and ASICs for deployment in space and ground infrastructures, contributing to the performance and capabilities of the Starlink network.

Advanced MaterialsAerospaceManufacturingNational SecuritySpace Travel

Growth Opportunities

No H1B

U.S. Citizen Only

Responsibilities

Design digital ASICs and/or FPGAs for Starlink projects

Evaluate architectural trade-offs based on features, performance requirements and system limitations

Define micro-architecture, implement the RTL in Verilog/System Verilog, integrate that in top level and deliver the fully verified, synthesis/timing clean design

Work closely with verification team to ensure all aspects of the design are covered and verified

Provide timing constraints for those IPs and support the physical implementation team (synthesis, timing closure, formality check)

Participate in silicon bring-up and validation

Qualification

RTL implementationASIC developmentFPGA designHigh speed designLow power designScripting skillsEDA toolsCan-do attitudeDynamic environment adaptabilityTeam player

Required

Bachelor's degree in electrical engineering, computer engineering, or computer science

10+ years of experience in RTL implementation and/or FPGA/ASIC development

Preferred

Experience solving problems including clock domain crossings and power optimization

Experience developing complex ASICs

Experience with multicore CPU subsystem design

Experience with standard bus protocols (e.g. AXI, AHB, etc.)

Experience with embedded processors

Experience with high speed and low power design techniques

Scripting skills (Python, TCL etc.)

Experience with EDA tools such as HDL simulators (e.g. VCS, Questa, IES), HDL Lint tools (e.g. Spyglass) and FPGA tools (e.g. Xilinx Vivado, Altera Quartus II)

Ability to work in a dynamic environment with changing needs and requirements

Team-player, can-do attitude and ability to work well in a group environment while still contributing on an individual basis

Enjoys being challenged and learning new skills