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Samsung Ads · 6 months ago

SoC Architect (Coherent Interconnect)

3900 N Capital of Texas Hwy, Austin, TX, USA

Full-time

Onsite

Senior Level, Lead/Staff

$175K/yr - $305K/yr

15+ years exp

Samsung, a world leader in advanced semiconductor technology, is seeking a highly experienced SoC Architect to lead the design and development of coherent interconnect architectures for next-generation System-on-Chip products. The role involves providing technical leadership, collaborating with cross-functional teams, and mentoring junior engineers to ensure the successful integration of interconnect solutions.

Marketing & Advertising

Responsibilities

You provide technical leadership and expertise in the design and development of coherent interconnect architectures, including cache coherence protocols, network-on-chip (NoC) designs, and high-speed interface protocols (e.g., AXI, ACE, CHI etc.)

You collaborate with cross-functional teams to define and optimize SoC architectures, ensuring that interconnect designs meet system performance, power, and area requirements

You lead the development of interconnect IP blocks, including specification, design, verification, and validation of coherent interconnect protocols and NoC fabrics

You analyze and optimize interconnect performance, power consumption, and area efficiency using simulation tools, modeling, and benchmarking

You work closely with various stakeholders, including system architects, IP designers, and software teams to ensure seamless integration of interconnect IP into SoC designs

You contribute to the development of technical roadmaps for coherent interconnect architectures, aligned with Samsung's strategic goals and industry trends

You mentor junior engineers and share knowledge and expertise with the team to ensure skill growth and expertise development

Qualification

SoC architectureCoherent interconnect designCache coherence protocolsNetwork-on-chip (NoC)High-speed interface protocolsInterconnect IP designSystem-level designC/C++ programmingPython programmingVerilog/VHDL programmingUnderstanding industry trendsTechnical leadershipCollaborationCommunication

Required

15+ years of experience with a Bachelor's degree in Computer Science/Computer Engineering/relevant technical field, or 13+ years of experience with a Master's degree, or 11+ years of experience with a PhD

15+ years of experience in SoC architecture, interconnect design, or related fields, with a focus on coherent interconnect architectures

In-depth knowledge of cache coherence protocols (e.g., MESI, MOESI, etc.)

In-depth knowledge of Network-on-chip (NoC) designs and protocols (e.g., AXI, ACE, CHI etc.)

In-depth knowledge of high-speed interface protocols (e.g., PCIe, USB, etc.)

In-depth knowledge of interconnect IP design and development

In-depth knowledge of system-level design and optimization

Proficiency in programming languages such as C, C++, Python, and Verilog/VHDL

Proven experience in technical leadership, collaboration, and communication with cross-functional teams

Strong understanding of industry trends and standards in SoC architecture, interconnect design, and related technologies