Infra Systems Physical Architect jobs in United States
cer-icon
Apply on Employer Site
company-logo

Qualcomm · 3 weeks ago

Infra Systems Physical Architect

Qualcomm Technologies, Inc. is a leading technology innovator that drives AI and automotive technology. The Infra Systems Physical Architect will design optimized NoCs and develop methodologies for implementing high-performance architectures, collaborating with cross-functional teams to achieve product execution goals.

Artificial Intelligence (AI)Generative AISoftwareTelecommunicationsWireless
check
Comp. & Benefits
check
H1B Sponsor Likelynote

Responsibilities

Plan, define, model, design, optimize, verify, validate, Analyze, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products
Design the best possible and optimized NoC (Network on Chip) which is highly floorplan driven
Produce custom methodologies best suited for implementing the NoC
Involve Architecture, planning, and enablement of the best-in-class NoCs, customized implementation techniques, to achieve best in class latency, area, performance, and power goals
Analyze, review, and improvement of functional and test (DFT) mode constraints for synthesis and place and route process
Design recipes for physical aware synthesis, special placement strategies, optimal floorplanning, special clocking solutions (like mesh clock tree), power planning and analysis for lower power, optimized special routing techniques for reduced wire delays, timing optimization and closure with signal integrity for MMMC designs
Analyze area, latency, timing, and power of the NoCs and estimate/plan physically aware NoC architectures for a more optimal one for the future

Qualification

NoC Implementation ExperiencePhysical Aware SynthesisClock tree PlanningTCL programmingPower domain analysisFormal verificationPythonPERL/TCLLinux/Unix shellC

Required

Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience

Preferred

5+ years industry experience/coursework in the following areas:
NoC Implementation Experience
AMBA Protocol
Cache Coherency mechanisms
Constraining and Timing Analysis experience
Physical Aware Synthesis
Physical Aware DFT
Physical Design
Clock tree Planning
Spine
Mesh CTS
Custom Placement and Routing and Source Sync Clock Routing
Formal verification experience
Power domain analysis experience
Design Compiler/Fusion Compiler/Genus/Primetime/Prime power/Innovus a plus
TCL programming in above tool environments will really be handy

Benefits

Competitive annual discretionary bonus program
Opportunity for annual RSU grants
Highly competitive benefits package

Company

Qualcomm

company-logo
Qualcomm designs wireless technologies and semiconductors that power connectivity, communication, and smart devices.

H1B Sponsorship

Qualcomm has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (2013)
2024 (1910)
2023 (3216)
2022 (2885)
2021 (2104)
2020 (1181)

Funding

Current Stage
Public Company
Total Funding
$3.5M
1991-12-20IPO
1988-01-01Undisclosed· $3.5M

Leadership Team

leader-logo
Cristiano Amon
President and Chief Executive Officer
linkedin
I
Isaac Eteminan
CEO
linkedin
Company data provided by crunchbase