Google · 1 week ago
Senior Silicon Bringup and Test Lead, Raxium
Fremont, CA
Full-time
Onsite
Senior Level, Lead/Staff
$227K/yr - $320K/yr
10+ years expGoogle is seeking a Silicon Pre-to-Post Validation Lead with experience in writing Verilog code to join their Raxium team. The role involves leading the silicon emulation and validation processes, requiring in-depth knowledge of RTL design, digital verification, and micro display validation.
AppsArtificial Intelligence (AI)Cloud StorageSearch EngineSEO
Responsibilities
Provide support for RTL verification through the utilization of various emulation techniques and the development of corresponding design flows. Upon the arrival of the first silicon, lead the bring-up process on various debugging stations, including, but not limited to, Field-Programmable Gate Array (FPGA)-based platforms. Assist in the analysis of silicon failures and collaborate with design and test engineering teams to ascertain root causes
Advocate enhancements in the validation flow, encompassing new tools, methodologies, and scripts, to boost efficiency and coverage
Forge partnerships with the architecture, physical design, and test engineering teams to guarantee integration and execution of the Design-for-Test (DFT) plan
Architect, design, and implement digital logic utilizing verilog or system verilog, deriving from specifications
Work cross-functionally with the verification team to define test plans, formulate assertions, and debug logic issues, thereby ensuring functional correctness
Qualification
Required
Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience
10 years of experience in analog circuit design, including simulation and verification
Experience working with relevant Electronic Design Automation (EDA) tools for circuit design and analysis
Preferred
15 years of experience in Application-Specific Integrated Circuit/System on Chip (ASIC/SoC) design, with a focus on both digital logic design and Design for Testability (DFT) implementation
Experience with industry-standard EDA tools for synthesis, Static Timing Analysis (STA), and DFT
Experience with advanced DFT techniques such as hierarchical DFT, compression, and diagnosis
Proficiency in hardware description languages (Verilog, SystemVerilog)
Excellent problem-solving, investigative, communication and teamwork skills
Benefits
Bonus
Equity
Benefits
Company
Google specializes in internet-related services and products, including search, advertising, and software. It is a sub-organization of Alphabet.
10001+ employees
H1B Sponsorship
Google has a track record of offering H1B sponsorships. Please note that this does not
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Funding
Current Stage
Public CompanyTotal Funding
$26.1MKey Investors
Andy Bechtolsheim
2004-08-19IPO
1999-06-07Series Unknown· $25M
1998-11-01Angel· $1M
Leadership Team
Sundar Pichai
CEO
Thomas Kurian
CEO - Google Cloud
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