Oracle · 1 day ago
Sr. Principal Signal Integrity Electrical Engineer
Santa Clara, CA
Full-time
Onsite
Senior Level, Lead/Staff
$120K/yr - $252K/yr
9+ years expOracle's West Coast Hardware Development organization is seeking a Principal Signal Integrity Electrical Engineer to collaborate with various teams in designing advanced server technologies. The role involves ensuring signal integrity from conception through deployment in cloud data centers, utilizing cutting-edge technology from leading companies.
Data GovernanceData ManagementEnterprise SoftwareInformation TechnologySaaSSoftware
Responsibilities
Work with System architects to assure system designs can meet the leading-edge bus speed requirements of the newest unreleased Intel, AMD, ARM processors, Nvidia GPUs and communication chips
Work directly with hardware design and development teams on architecture, implementation, development, deployment, and troubleshooting of SI solutions for Server and AI hardware platforms
Evaluate the various design parameters including I/O timing budget, number/type/placement of decoupling capacitors, routing topology - using simulators or measurements from test vehicles
Simulate the solution space for High Speed SerDes bus topologies
Work with the board designers to arrive at an optimal set of board routing and design rules to ensure optimal noise and timing margin for reliable hardware products
Work with Oracle Partners like Intel, AMD and Nvidia to assure server designs meet the Signal Integrity requirements of the silicon
Work with Oracle electrical interconnect partners to define high speed low loss interconnect solutions
Guide in-house CAD designers to optimally place and route designs for SI
Participate in design reviews, system, boards, schematic and board
Mentor other SI engineers and Board engineers on good SI practices
Critical System component selection including connectors, cables, PCB materials, etc
Perform post-layout verification of the signal and power planes on the boards using verification tools
Correlate simulation model and result to lab measurements
Work with our Validation team to develop and test systems to ensure adequate margin for manufacturability and stability through product lifetime
Work in the Lab to debug SI related problems
Work with PCB suppliers on stack-up requirements and revisions
Qualification
Required
Solid electronic circuit background with an in-depth knowledge of modern PCB design techniques for Signal Integrity
Strong electromagnetic (EM) or EMI knowledge
Must understand the system design trade-offs related to SI
In depth knowledge of high-speed design, transmission-line theory, 3D-fieldsolver methods, noise analysis and EMC techniques
Experience with simulation tools such as Ansys, ADS, MATLAB, Simbeor, HFSS, Q3D, CST, ADS, Cadence, Sigrity, MATLAB, HSPICE, etc
Experience with behavioral models (IBIS or SPICE) and their usage in system level simulation
Experience with S-parameters and frequency-based analysis
Experience with High-Speed PCB laminates and low loss cabling
Proficient in constraint driven design methodologies
Experience with measurement equipment such as oscilloscope, impedance analyzer, and network analyzer
Experience with the board design tools such as Allegro, and Constraint Manager
SI design experience with high-speed buses to include: PCIe (Gen5 and above), Intel UPI/DMI, DDR5, SAS, SATA, Muli-gigabit Ethernet (25-100G+), USB, SPI, etc
Good communication/presentation skills
PhD combined with 5 years of related experience, or MSEE/BSEE combined with 9+ years related experience
Benefits
Medical, dental, and vision insurance, including expert medical opinion
Short term disability and long term disability
Life insurance and AD&D
Supplemental life insurance (Employee/Spouse/Child)
Health care and dependent care Flexible Spending Accounts
Pre-tax commuter and parking benefits
401(k) Savings and Investment Plan with company match
Paid time off: Flexible Vacation is provided to all eligible employees assigned to a salaried (non-overtime eligible) position. Accrued Vacation is provided to all other employees eligible for vacation benefits. For employees working at least 35 hours per week, the vacation accrual rate is 13 days annually for the first three years of employment and 18 days annually for subsequent years of employment. Vacation accrual is prorated for employees working between 20 and 34 hours per week. Employees working fewer than 20 hours per week are not eligible for vacation.
11 paid holidays
Paid sick leave: 72 hours of paid sick leave upon date of hire. Refreshes each calendar year. Unused balance will carry over each year up to a maximum cap of 112 hours.
Paid parental leave
Adoption assistance
Employee Stock Purchase Plan
Financial planning and group legal
Voluntary benefits including auto, homeowner and pet insurance
Company
Oracle
Oracle is an integrated cloud application and platform services that sells a range of enterprise information technology solutions.
10001+ employees
H1B Sponsorship
Oracle has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (1271)
2024 (846)
2023 (995)
2022 (1192)
2021 (985)
2020 (755)
Funding
Current Stage
Public CompanyTotal Funding
$25.75BKey Investors
Sequoia Capital
2025-09-24Post Ipo Debt· $18B
2025-02-03Post Ipo Debt· $7.75B
1986-03-12IPO
Leadership Team
Esteban Rubens
Healthcare Field CTO
G
Gerard Warrens
Field CTO, Business Strategy and Transformative Technologies
Recent News
2026-01-07
2026-01-06
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