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Cisco · 1 day ago

Lead HW Post-Silicon Validation Engineer

San Jose, CA

Full-time

Onsite

Senior Level, Lead/Staff

$152K/yr - $222K/yr

8+ years exp

Cisco is a leading networking company that is revolutionizing how data and infrastructure connect. They are seeking a Senior HW Post-Silicon Validation Engineer to lead the testing and debugging of high-performance networking silicon, focusing on hands-on work in silicon validation labs and driving early-silicon bring-up.

Communications InfrastructureEnterprise SoftwareHardwareSoftware

Growth Opportunities

H1B Sponsor Likely

Responsibilities

Lead hands-on post-silicon electrical validation in lab environments for networking ASICs and evaluation platforms

Own early-silicon bring-up activities from first power-on through feature enablement

Define, execute, and refine detailed hardware validation plans covering functionality characterization, performance, and reliability

Drive validation readiness, lab infrastructure setup, and test coverage strategy

Maintain and optimize lab benches, boards, fixtures, and test equipment

Lead power-on sequencing, reset strategy validation, clock bring-up, and strap configuration

Perform in-depth voltage, current, power integrity (PDN), and signal integrity analysis

Capture, analyze, and interpret waveforms, eye diagrams, jitter, BER, PDN measurements, power supply stability and noise

Independently isolate and root-cause silicon, package, board, or signal integrity issues

Develop mitigation strategies, workarounds, and design recommendations

Lead validation of Ethernet MAC/PHY and high-speed interfaces such as PCIe and SerDes

Drive link bring-up, training, lane margining, compliance, and interoperability testing

Perform advanced BER testing and margin analysis across voltage, temperature, and process corners

Oversee packet-level validation using traffic generators and protocol analyzers

Validate system-level behavior under real-world networking workloads

Advanced-level operation of oscilloscopes, logic analyzers, VNAs, protocol analyzers, BERTs, and multimeters

Develop and maintain lab automation using scripts and frameworks (e.g., Python)

Plan and execute thermal testing using chambers and chillers across operating ranges

Drive technical discussions with design teams using data-backed analysis

Lead debug reviews, validation status meetings, and silicon readiness assessments

Qualification

Post-silicon validationElectrical validationHigh-speed interfacesSignal integrity analysisLab automation (Python)Hardware bring-upPower integrityAdvanced measurement techniquesTechnical discussionsTeam collaborationProblem-solving

Required

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field with 8+ years of experience in post-silicon electrical validation, hardware bring-up and lab-based silicon debug

Experience in electronics, digital logic, signal integrity, and power integrity

Experience in high-speed measurement techniques (eye diagrams, BER, jitter, compliance testing)

Experience with interfaces such as DDR5, USB 3.x, SGMII, PCIe Gen3, USB2.0, eMMC, SPI, MDIO, I2C, and UART

Experience with Reading and Reviewing schematics and layout files for complex boards

Experience working independently, lead, plan and execute lab-based debug efforts