Sr. Manager, ASIC Design jobs in United States
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Credo · 2 days ago

Sr. Manager, ASIC Design

positionSan Jose, CA
timeFull-time
remoteOnsite
senioritySenior Level, Lead/Staff
money$200K/yr - $230K/yr
date10+ years exp

Credo is engineering the future of high-speed connectivity for the AI-driven world. As a Sr. Manager, ASIC Design, you will lead a team of engineers in delivering complex ASIC designs from specification to tape-out, collaborating with various teams to ensure successful outcomes.

Big DataInformation TechnologyInfrastructureSemiconductor
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Growth Opportunities
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H1B Sponsor Likelynote

Responsibilities

Lead a team of engineers to deliver chips from specification through tapeout
Mentor junior engineers on design methodologies, verification flows, and best practices
Develop and maintain detailed microarchitecture and design specifications
Design, implement, and debug complex logic blocks
Integrate and validate IPs from internal and external vendors
Support front-end integration activities, including Lint, CDC, synthesis, and ECO processes
Create functional tests and testbenches; perform RTL and gate-level verification and simulations
Collaborate with verification, DFT, and physical design teams to ensure successful tapeout
Bring up, validate, and debug functional features on silicon
Work closely with software, firmware, applications, and systems teams to deliver a high-quality product

Qualification

ASIC designVerilog/SystemVerilogDigital logic designStatic timing analysisHigh-speed Serdes designTestbenchesTest casesScripting languagesPlanningEstimationCommunicationLeadership abilities

Required

MS degree in EE/CS with 10+ years of relevant experience
Deep understanding of digital logic design and complex synchronous/asynchronous interfaces
Proficient in Verilog/SystemVerilog RTL design
Knowledge of synthesis and static timing analysis
Experience in high-speed Serdes design and familiar with Ethernet (802.3) standards
Experience developing testbenches and test cases; familiarity with UVM
Experience with gate-level simulations, chip bring-up, and validation
Proven track record of successful production tape-outs
Hands-on experience with STA and timing closure
Familiarity with DFT methodology and physical design flow

Preferred

Expertise in scripting languages (Python, Tcl, Perl, Shell)
Knowledge of UCIE, or UAlink, AXI/CHI interface is a plus
Strong planning and estimation skills
Excellent communication and leadership abilities

Benefits

Discretionary bonus
Equity
Full range of medical and other benefits

Company

Credo

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Credo’s mission is to advance high-speed connectivity solutions that deliver optimized performance, reliability, energy efficiency, and security for the next generation of AI-driven applications, cloud computing, and hyperscale networks.
dateFounded in 2008
location
San Jose, California, USA
people-size501-1000 employees
web-link
http://www.credosemi.com

H1B Sponsorship

Credo has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (14)
2024 (13)
2023 (8)
2022 (3)
2021 (5)
2020 (5)

Funding

Current Stage
Public Company
Total Funding
$108M
Key Investors
BlackRockWalden International
2022-01-27IPO
2020-06-06Series D· $100M
2015-08-31Series A· $8M

Leadership Team

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Bill Brennan
President & CEO
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Lawrence Cheng
CTO and Co-Founder
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Recent News

Business Wire
Credo Releases 2025 Environmental, Social, and Governance (ESG) Report
2025-12-30
Business Wire
Credo to Present at Barclays 23rd Annual Global Technology Conference
2025-12-03
MarketScreener
Credo Licenses Its Active Electrical Cable Patents To The Siemon Company
2025-11-24
Company data provided by crunchbase