Intel Corporation · 1 day ago
Senior Design Verification Engineer
US, California, Santa Clara
Full-time
Onsite
Senior Level, Lead/Staff
$191K/yr - $269K/yr
12+ years expIntel Corporation is seeking a highly technical Senior Design Verification Engineer to design and deliver next-generation chassis IPs. This role involves establishing verification strategies, driving technical development, and ensuring first-pass silicon success through advanced IP design and verification practices.
Semiconductors
Responsibilities
Design, develop, and deliver a comprehensive verification strategy and methodology that scales seamlessly from IP through subsystems to SoC-level verification
Design and implement advanced verification environments, tools, and test plans enabling first-pass silicon success; develop sophisticated testbenches, checkers, VIPs, and complex behavioral models
Collaborate closely with architecture, design, and software teams from initial product definition and specification reviews through implementation, bring up, and productization phases; balance complexity and ensure timely, high-quality execution
Drive ownership of multiple critical blocks and verification components; take full responsibility for functional signoffs and achievement of performance and power metrics
Lead IP delivery to multiple customers while ensuring technical excellence; balance competing requirements, schedules, and resources across teams
Champion innovation across simulation, formal, and accelerated verification methodologies; develop and evaluate new ML-based flows and hybrid software frameworks
Mentor and develop verification engineers; establish verification best practices and drive organizational technical excellence
Qualification
Required
BS/MS in Electrical Engineering, Computer Science, or related field, with 12+ years of combined experience in:
Design verification; extensive background in IP DV with significant, demonstrated experience in subsystem and SoC-level verification
Interconnects, caches, and memory subsystems, including multiple bus protocols such as AMBA (CHI, ACE, AXI), PCIe, UCIe, and CXL; cache coherency and memory consistency models
Verification of global functions including debug, trace, clock & power management, RAS, QoS, and security features
Simulation-based verification methodologies including UVM, ABV, and co-simulation; proficiency in low-power verification techniques, HDL/verification languages, and industry-standard EDA tools
Coding proficiency across System Verilog/UVM, software programming languages (C/C++), scripting (Python), and build systems; established track record of developing and delivering highly configurable and reusable verification collateral
Benefits
Competitive pay
Stock
Bonuses
Benefit programs which include health
Retirement
Vacation
Company
Intel Corporation
Our mission is to shape the future of technology to help create a better future for the entire world, that’s the power of Intel Inside.
10001+ employees
H1B Sponsorship
Intel Corporation has a track record of offering H1B sponsorships. Please note that this does not
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Funding
Current Stage
Late StageLeadership Team
Brea Watts, MFA
Communications Manager, CEO
Carol Bartz
CEO
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